Anuj Pathania

ORCID

Publication Activity (10 Years)

Years Active: 2014-2023
Publications (10 Years): 40

Top Venues

DATE

DAC

IEEE Trans. Computers

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Karlsruhe Institute of Technology, Germany (PHD)

Education History

Karlsruhe Institute of Technology, Germany

PHD

Publications

Yixian Shen, Sobhan Niknam, Anuj Pathania, Andy D. Pimentel
Thermal Management for S-NUCA Many-Cores via Synchronous Thread Rotations. DATE (2023)
Yixian Shen, Leo Schreuders, Anuj Pathania, Andy D. Pimentel
Thermal Management for 3D-Stacked Systems via Unified Core-Memory Power Regulation. ACM Trans. Embed. Comput. Syst. 22 (5s) (2023)
Ana Lucia Varbanescu, Stephen Nicholas Swatman, Anuj Pathania
Performance Engineering for Graduate Students: a View from Amsterdam. SC Workshops (2023)
Saeedeh Baneshi, Ana Lucia Varbanescu, Anuj Pathania, Benny Akesson, Andy D. Pimentel
Estimating the Energy Consumption of Applications in the Computing Continuum with iFogSim. ISC Workshops (2023)
Sobhan Niknam, Yixian Shen, Anuj Pathania, Andy D. Pimentel
3D-TTP: Efficient Transient Temperature-Aware Power Budgeting for 3D-Stacked Processor-Memory Systems. ISVLSI (2023)
Saeedeh Baneshi, Ana Lucia Varbanescu, Anuj Pathania, Benny Akesson, Andy D. Pimentel
Analyzing Digital Services Across the Compute Continuum Using iFogSim. RTCSA (2023)
Sudam Maduranga Wasala, Sobhan Niknam, Anuj Pathania, Clemens Grelck, Andy D. Pimentel
Lifetime Estimation for Core-Failure Resilient Multi-Core Processors. MCSoC (2023)
Ehsan Aghapour, Dolly Sapra, Andy D. Pimentel, Anuj Pathania
PELSI: Power-Efficient Layer-Switched Inference. RTCSA (2023)
Lokesh Siddhu, Rajesh Kedia, Shailja Pandey, Martin Rapp, Anuj Pathania, Jörg Henkel, Preeti Ranjan Panda
CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems. ACM Trans. Archit. Code Optim. 19 (3) (2022)
Dhananjaya Wijerathne, Zhaoying Li, Anuj Pathania, Tulika Mitra, Lothar Thiele
HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Ehsan Aghapour, Dolly Sapra, Andy D. Pimentel, Anuj Pathania
CPU-GPU Layer-Switched Low Latency CNN Inference. DSD (2022)
Zhaoying Li, Dhananjaya Wijerathne, Xianzhang Chen, Anuj Pathania, Tulika Mitra
ChordMap: Automated Mapping of Streaming Applications Onto CGRA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (2) (2022)
Dhananjaya Wijerathne, Zhaoying Li, Anuj Pathania, Tulika Mitra, Lothar Thiele
HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction. DATE (2021)
Sami Salamin, Martin Rapp, Anuj Pathania, Arka Maity, Jörg Henkel, Tulika Mitra, Hussam Amrouch
Power-Efficient Heterogeneous Many-Core Design With NCFET Technology. IEEE Trans. Computers 70 (9) (2021)
Sobhan Niknam, Anuj Pathania, Andy D. Pimentel
T-TSP: Transient-Temperature Based Safe Power Budgeting in Multi-/Many-Core Processors. ICCD (2021)
Lokesh Siddhu, Rajesh Kedia, Shailja Pandey, Martin Rapp, Anuj Pathania, Jörg Henkel, Preeti Ranjan Panda
CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems. CoRR (2021)
Martin Rapp, Anuj Pathania, Tulika Mitra, Jörg Henkel
Neural Network-Based Performance Prediction for Task Migration on S-NUCA Many-Cores. IEEE Trans. Computers 70 (10) (2021)
Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra
Unified Thread- and Data-Mapping for Multi-Threaded Multi-Phase Applications on SPM Many-Cores. DATE (2020)
Siqi Wang, Anuj Pathania, Tulika Mitra
Neural Network Inference on Mobile SoCs. IEEE Des. Test 37 (5) (2020)
Siqi Wang, Gayathri Ananthanarayanan, Yifan Zeng, Neeraj Goel, Anuj Pathania, Tulika Mitra
High-Throughput CNN Inference on Embedded ARM Big.LITTLE Multicore Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Alexander Hoffman, Anuj Pathania, Philipp H. Kindt, Samarjit Chakraborty, Tulika Mitra
BrezeFlow: Unified Debugger for Android CPU Power Governors and Schedulers on Edge Devices. DAC (2020)
Martin Rapp, Mark Sagi, Anuj Pathania, Andreas Herkersdorf, Jörg Henkel
Power- and Cache-Aware Task Mapping with Dynamic Power Budgeting for Many-Cores. IEEE Trans. Computers 69 (1) (2020)
Martin Rapp, Anuj Pathania, Tulika Mitra, Jörg Henkel
Prediction-Based Task Migration on S-NUCA Many-Cores. DATE (2019)
Siqi Wang, Anuj Pathania, Tulika Mitra
Neural Network Inference on Mobile SoCs. CoRR (2019)
Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra
Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core Processors. SAMOS (2019)
Siqi Wang, Gayathri Ananthanarayanan, Yifan Zeng, Neeraj Goel, Anuj Pathania, Tulika Mitra
High-Throughput CNN Inference on Embedded ARM big.LITTLE Multi-Core Processors. CoRR (2019)
Dhananjaya Wijerathne, Zhaoying Li, Manupa Karunarathne, Anuj Pathania, Tulika Mitra
CASCADE: High Throughput Data Streaming via Decoupled Access-Execute CGRA. ACM Trans. Embed. Comput. Syst. 18 (5s) (2019)
Anuj Pathania, Jörg Henkel
HotSniper: Sniper-Based Toolchain for Many-Core Thermal Simulations in Open Systems. IEEE Embed. Syst. Lett. 11 (2) (2019)
Anuj Pathania, Jörg Henkel
Task scheduling for many-cores with S-NUCA caches. DATE (2018)
Anuj Pathania, Heba Khdr, Muhammad Shafique, Tulika Mitra, Jörg Henkel
QoS-aware stochastic power management for many-cores. DAC (2018)
Vanchinathan Venkataramani, Anuj Pathania, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Scalable Dynamic Task Scheduling on Adaptive Many-Core. MCSoC (2018)
Martin Rapp, Anuj Pathania, Jörg Henkel
Pareto-Optimal Power- and Cache-Aware Task Mapping for Many-Cores with Distributed Shared Last-Level Cache. ISLPED (2018)
Anuj Pathania, Heba Khdr, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Scalable probabilistic power budgeting for many-cores. DATE (2017)
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Defragmentation of Tasks in Many-Core Architecture. ACM Trans. Archit. Code Optim. 14 (1) (2017)
Heba Khdr, Santiago Pagani, Éricles Sousa, Vahid Lari, Anuj Pathania, Frank Hannig, Muhammad Shafique, Jürgen Teich, Jörg Henkel
Power Density-Aware Resource Management for Heterogeneous Tiled Multicores. IEEE Trans. Computers 66 (3) (2017)
Santiago Pagani, Anuj Pathania, Muhammad Shafique, Jian-Jia Chen, Jörg Henkel
Energy Efficiency for Clustered Heterogeneous Multicores. IEEE Trans. Parallel Distributed Syst. 28 (5) (2017)
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Optimal Greedy Algorithm for Many-Core Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (6) (2017)
Santiago Pagani, Lars Bauer, Qingqing Chen, Elisabeth Glocker, Frank Hannig, Andreas Herkersdorf, Heba Khdr, Anuj Pathania, Ulf Schlichtmann, Doris Schmitt-Landsiedel, Mark Sagi, Éricles Sousa, Philipp Wagner, Volker Wenzel, Thomas Wild, Jörg Henkel
Dark silicon management: an integrated and coordinated cross-layer approach. it Inf. Technol. 58 (6) (2016)
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Distributed scheduling for many-cores using cooperative game theory. DAC (2016)
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Distributed fair scheduling for many-cores. DATE (2016)
Anuj Pathania, Santiago Pagani, Muhammad Shafique, Jörg Henkel
Power management for mobile games on asymmetric multi-cores. ISLPED (2015)
Anuj Pathania, Alexandru Eugen Irimiea, Alok Prakash, Tulika Mitra
Power-Performance Modelling of Mobile Gaming Workloads on Heterogeneous MPSoCs. DAC (2015)
Anuj Pathania, Qing Jiao, Alok Prakash, Tulika Mitra
Integrated CPU-GPU Power Management for 3D Mobile Games. DAC (2014)
Thannirmalai Somu Muthukaruppan, Anuj Pathania, Tulika Mitra
Price theory based power management for heterogeneous multi-cores. ASPLOS (2014)

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Publication Activity (10 Years)

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Anuj Pathania