Vanchinathan Venkataramani

Publication Activity (10 Years)

Years Active: 2013-2022
Publications (10 Years): 16

Top Topics

Design Space Exploration

Dynamically Adjust

Memory Management

Cooperative Game Theory

Top Venues

ACM Trans. Embed. Comput. Syst.

Publications

Vanchinathan Venkataramani, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
ASCENT: Communication Scheduling for SDF on Bufferless Software-Defined NoC. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Vanchinathan Venkataramani, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
Time-Predictable Software-Defined Architecture with Sdf-Based Compiler Flow for 5g Baseband Processing. ICASSP (2020)
Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra
Unified Thread- and Data-Mapping for Multi-Threaded Multi-Phase Applications on SPM Many-Cores. DATE (2020)
Vanchinathan Venkataramani, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
SPECTRUM: A Software-defined Predictable Many-core Architecture for LTE/5G Baseband Processing. ACM Trans. Embed. Comput. Syst. 19 (5) (2020)
Niklas Ueter, Jian-Jia Chen, Georg von der Brüggen, Vanchinathan Venkataramani, Tulika Mitra
Simultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips. RTCSA (2020)
Vanchinathan Venkataramani, Mun Choon Chan, Tulika Mitra
Scratchpad-Memory Management for Multi-Threaded Applications on Many-Core Architectures. ACM Trans. Embed. Comput. Syst. 18 (1) (2019)
Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra
Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core Processors. SAMOS (2019)
Niklas Ueter, Georg von der Brüggen, Jian-Jia Chen, Tulika Mitra, Vanchinathan Venkataramani
Simultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips. CoRR (2019)
Vanchinathan Venkataramani, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
SPECTRUM: a software defined predictable many-core architecture for LTE baseband processing. LCTES (2019)
Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
LOCUS: Low-Power Customizable Many-Core Architecture for Wearables. ACM Trans. Embed. Comput. Syst. 17 (1) (2018)
Vanchinathan Venkataramani, Anuj Pathania, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Scalable Dynamic Task Scheduling on Adaptive Many-Core. MCSoC (2018)
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Defragmentation of Tasks in Many-Core Architecture. ACM Trans. Archit. Code Optim. 14 (1) (2017)
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Optimal Greedy Algorithm for Many-Core Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (6) (2017)
Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
LOCUS: low-power customizable many-core architecture for wearables. CASES (2016)
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Distributed scheduling for many-cores using cooperative game theory. DAC (2016)
Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jörg Henkel
Distributed fair scheduling for many-cores. DATE (2016)
Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smaïl Niar
Design space exploration of multiple loops on FPGAs using high level synthesis. ICCD (2014)
Thannirmalai Somu Muthukaruppan, Mihai Pricopi, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin
Hierarchical power management for asymmetric multi-core in dark silicon era. DAC (2013)
Mihai Pricopi, Thannirmalai Somu Muthukaruppan, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin
Power-performance modeling on asymmetric multi-cores. CASES (2013)