Don E. Ross

Publication Activity (10 Years)

Years Active: 1988-2004
Publications (10 Years): 0

Publications

Xiaogang Du, Sudhakar M. Reddy, Don E. Ross, Wu-Tung Cheng, Joseph Rayhawk
Memory BIST Using ESP. VTS (2004)
Don E. Ross, Tim Wood, Grady Giles
Conversion of small functional test sets of nonscan blocks to scan patterns. ITC (2000)
Jawahar Jain, Dinos Moundanos, James R. Bitner, Jacob A. Abraham, Donald S. Fussell, Don E. Ross
Efficient variable ordering and partial representation algorithm. VLSI Design (1995)
Murali M. R. Gala, Don E. Ross, Karan L. Watson, Beena Vasudevan, Peter Utama
Built-in self test for C-testable ILA's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (11) (1995)
Murali M. R. Gala, Peter Utama, Don E. Ross, Karan L. Watson
Linear finite state machine for lD ILAs. VTS (1994)
Beena Vasudevan, Don E. Ross, Murali M. R. Gala, Karan L. Watson
LFSR based deterministic hardware for at-speed BIST. VTS (1993)
Sherif H. K. Embabi, R. Damodaran, R. Bhagwan, Don E. Ross
An Accurate Delay Model for BiCMOS Gates and Off-chip Drivers. ISCAS (1993)
Murali M. R. Gala, Karan L. Watson, Don E. Ross
Testability of one dimensional ILAs under multiple faults. VTS (1993)
Ravishankar Kodavarti, Don E. Ross
Signal probability calculations using partial functional manipulation. VTS (1993)
M. Ray Mercer, Rohit Kapur, Don E. Ross
Functional Approaches to Generating Orderings for Efficient Symbolic Representations. DAC (1992)
Kenneth M. Butler, Rohit Kapur, M. Ray Mercer, Don E. Ross
The roles of controllability and observability in design for test. VTS (1992)
Don E. Ross, Kenneth M. Butler, Rohit Kapur, M. Ray Mercer
Fast functional evaluation of candidate OBDD variable orderings. EURO-DAC (1991)
Don E. Ross, Kenneth M. Butler, M. Ray Mercer
Exact ordered binary decision diagram size when representing classes of symmetric functions. J. Electron. Test. 2 (3) (1991)
Kenneth M. Butler, Don E. Ross, Rohit Kapur, M. Ray Mercer
Heuristics to Compute Variable Orderings for Efficient Manipulation of Ordered Binary Decision Diagrams. DAC (1991)
Rhonda Kay Gaede, Don E. Ross, M. Ray Mercer, Kenneth M. Butler
CATAPULT: Concurrent Automatic Testing Allowing Parallelization and Using Limited Topology. DAC (1988)