Chien-Heng Wong

Publication Activity (10 Years)

Years Active: 2013-2019
Publications (10 Years): 11

Top Topics

Fully Integrated

High Temperature

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Jieqiong Du, Chien-Heng Wong, Yo-Hao Tu, Wei-Han Cho, Yilei Li, Yuan Du, Po-Tsang Huang, Sheau Jiung Lee, Mau-Chung Frank Chang
A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET. NOCS (2019)
Yiwu Tang, Chien-Heng Wong, Yuan Du, Li Du, Yilei Li, Mau-Chung Frank Chang
A fully integrated 28nm CMOS dual source adaptive thermoelectric and RF energy harvesting circuit with 110mv startup voltage. CICC (2018)
X. Shawn Wang, Xin Jin, Jieqiong Du, Yilei Li, Yuan Du, Chien-Heng Wong, Yen-Cheng Kuan, Chi-Hang Chan, Mau-Chung Frank Chang
A 2-GS/s 8-Bit ADC Featuring Virtual-Ground Sampling Interleaved Architecture in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs (11) (2018)
Yilei Li, Kirti Dhwaj, Chien-Heng Wong, Yuan Du, Li Du, Yiwu Tang, Yiyu Shi, Tatsuo Itoh, Mau-Chung Frank Chang
A Novel Fully Synthesizable All-Digital RF Transmitter for IoT Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (1) (2018)
Yuan Du, Wei-Han Cho, Po-Tsang Huang, Yilei Li, Chien-Heng Wong, Jieqiong Du, Yanghyo Kim, Boyu Hu, Li Du, Chun-Chen Liu, Sheau Jiung Lee, Mau-Chung Frank Chang
A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection. IEEE J. Solid State Circuits 52 (4) (2017)
Zuow-Zun Chen, Yen-Cheng Kuan, Yilei Li, Boyu Hu, Chien-Heng Wong, Mau-Chung Frank Chang
DPLL for Phase Noise Cancellation in Ring Oscillator-Based Quadrature Receivers. IEEE J. Solid State Circuits 52 (4) (2017)
Chin-Yu Lin, Chien-Heng Wong, Chia-Hau Hsu, Yen-Hsin Wei, Tai-Cheng Lee
Noise. IEEE Trans. Circuits Syst. II Express Briefs (9) (2016)
Zuow-Zun Chen, Yilei Li, Yen-Cheng Kuan, Boyu Hu, Chien-Heng Wong, Mau-Chung Frank Chang
Digital PLL for phase noise cancellation in ring oscillator-based I/Q receivers. VLSI Circuits (2016)
Yuan Du, Wei-Han Cho, Yilei Li, Chien-Heng Wong, Jieqiong Du, Po-Tsang Huang, Yanghyo Kim, Zuow-Zun Chen, Sheau Jiung Lee, Mau-Chung Frank Chang
A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS. VLSI Circuits (2016)
Wei-Han Cho, Yilei Li, Yuan Du, Chien-Heng Wong, Jieqiong Du, Po-Tsang Huang, Sheau Jiung Lee, Huan-Neng Ron Chen, Chewnpu Jou, Fu-Lung Hsueh, Mau-Chung Frank Chang
10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface. ISSCC (2016)
Chun-Chen Liu, Yen-Hsiang Wang, Yilei Li, Chien-Heng Wong, Tien Pei Chou, Young-Kai Chen, M.-C. Frank Chang
Invited - A 2.2 GHz SRAM with high temperature variation immunity for deep learning application under 28nm. DAC (2016)
Chien-Heng Wong, Tai-Cheng Lee
A 6-GHz Self-Oscillating Spread-Spectrum Clock Generator. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2013)