10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface.
Wei-Han ChoYilei LiYuan DuChien-Heng WongJieqiong DuPo-Tsang HuangSheau Jiung LeeHuan-Neng Ron ChenChewnpu JouFu-Lung HsuehMau-Chung Frank ChangPublished in: ISSCC (2016)
Keyphrases
- high speed
- gigabit ethernet
- low power
- power consumption
- cmos technology
- frequency response
- ultra low power
- nm technology
- memory requirements
- power dissipation
- real time
- bit error rate
- spectral resolution
- frame rate
- detection algorithm
- focal plane
- traffic flow
- low voltage
- data acquisition
- fading channels
- frequency band
- main memory
- hd video
- direct memory access
- user interface