Charles C. Chiang

Publication Activity (10 Years)

Years Active: 1989-2017
Publications (10 Years): 2

Top Topics

Feature Extraction

Canny Edge Detection

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Fan Yang, Charles C. Chiang, Xuan Zeng, Dian Zhou
Efficient SVM-based hotspot detection using spectral clustering. ISCAS (2017)
Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng, Dian Zhou
Improved Tangent Space-Based Distance Metric for Lithographic Hotspot Classification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (9) (2017)
Yen-Ting Yu, Geng-He Lin, Iris Hui-Ru Jiang, Charles C. Chiang
Machine-Learning-Based Hotspot Detection Using Topological Classification and Critical Feature Extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (3) (2015)
Wei Zhao, Hailong Yao, Yici Cai, Subarna Sinha, Charles C. Chiang
Fast and scalable parallel layout decomposition in double patterning lithography. Integr. 47 (2) (2014)
Yen-Ting Yu, Iris Hui-Ru Jiang, Yumin Zhang, Charles C. Chiang
DRC-based hotspot detection considering edge tolerance and incomplete specification. ICCAD (2014)
Cristian Andrades, M. Andrea Rodríguez, Charles C. Chiang
Signature indexing of design layouts for hotspot detection. DATE (2014)
Yen-Ting Yu, Geng-He Lin, Iris Hui-Ru Jiang, Charles C. Chiang
Machine-learning-based hotspot detection using topological classification and critical feature extraction. DAC (2013)
Yen-Ting Yu, Ya-Chung Chan, Subarna Sinha, Iris Hui-Ru Jiang, Charles C. Chiang
Accurate process-hotspot detection using critical design rule extraction. DAC (2012)
Jing Guo, Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng
Improved tangent space based distance metric for accurate lithographic hotspot classification. DAC (2012)
Kai-Ti Hsu, Subarna Sinha, Yu-Chuan Pi, Charles C. Chiang, Tsung-Yi Ho
A distributed algorithm for layout geometry operations. DAC (2011)
Charles C. Chiang, Subarna Sinha
The road to 3D EDA tool readiness. ASP-DAC (2009)
Hailong Yao, Subarna Sinha, Jingyu Xu, Charles C. Chiang, Yici Cai, Xianlong Hong
Efficient range pattern matching algorithm for process-hotspot detection. IET Circuits Devices Syst. 2 (1) (2008)
Qing Su, Charles C. Chiang, Jamil Kawa
Hotspot Based Yield Prediction with Consideration of Correlations. ISQED (2008)
Jingyu Xu, Subarna Sinha, Charles C. Chiang
Accurate detection for process-hotspots with vias and incomplete specification. ICCAD (2007)
Subarna Sinha, Jianfeng Luo, Charles C. Chiang
Model Based Layout Pattern Dependent Metal Filling Algorithm for Improved Chip Surface Uniformity in the Copper Process. ASP-DAC (2007)
Jun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou, Charles C. Chiang
Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations. ASP-DAC (2007)
Jamil Kawa, Charles C. Chiang
DFM issues for 65nm and beyond. ACM Great Lakes Symposium on VLSI (2007)
Subarna Sinha, Charles C. Chiang
A methodology for fast and accurate yield factor estimation during global routing. ICCAD (2007)
Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky
Fast and Efficient Bright-Field AAPSM Conflict Detection and Correction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (1) (2007)
Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky
Bright-Field AAPSM Conflict Detection and Correction CoRR (2007)
Subarna Sinha, Qing Su, Linni Wen, Frank Lee, Charles C. Chiang, Yi-Kan Cheng, Jin-Lien Lin, Yu-Chyi Harn
A New Flexible Algorithm for Random Yield Improvement. ISQED (2007)
Qing Su, Jamil Kawa, Charles C. Chiang, Yehia Massoud
Accurate modeling of substrate resistive coupling for floating substrates. ACM Trans. Design Autom. Electr. Syst. 11 (1) (2006)
Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles C. Chiang
A one-shot projection method for interconnects with process variations. ISCAS (2006)
Jianfeng Luo, Subarna Sinha, Qing Su, Jamil Kawa, Charles C. Chiang
An IC manufacturing yield model considering intra-die variations. DAC (2006)
Charles C. Chiang, Jamil Kawa
Three DFM Challenges: Random Defects, Thickness Variation, and Printability Variation. APCCAS (2006)
Xuan Zeng, Lihong Feng, Yangfeng Su, Wei Cai, Dian Zhou, Charles C. Chiang
Time domain model order reduction by wavelet collocation method. DATE (2006)
Jamil Kawa, Charles C. Chiang, Raul Camposano
EDA Challenges in Nano-scale Technology. CICC (2006)
Hailong Yao, Subarna Sinha, Charles C. Chiang, Xianlong Hong, Yici Cai
Efficient process-hotspot detection using range pattern matching. ICCAD (2006)
Dan Page, Jamil Kawa, Charles C. Chiang
DFM: swimming upstream. ACM Great Lakes Symposium on VLSI (2006)
Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu
Fast and efficient phase conflict detection and correction in standard-cell layouts. ICCAD (2005)
Wen Yujie, Jiarong Tong, Charles C. Chiang
Domain Specific Non-Uniform Routing Architecture for Embedded Programmable IP Core (abstract only). FPGA (2005)
Jianfeng Luo, Qing Su, Charles C. Chiang, Jamil Kawa
A layout dependent full-chip copper electroplating topography model. ICCAD (2005)
Xin Wang, Charles C. Chiang, Jamil Kawa, Qing Su
A Min-Variance Iterative Method for Fast Smart Dummy Feature Density Assignment in Chemical-Mechanical Polishing. ISQED (2005)
Bang Liu, Xuan Zeng, Yangfeng Su, Jun Tao, Zhaojun Bai, Charles C. Chiang, Dian Zhou
Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits. ASP-DAC (2005)
Charles C. Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky
Bright-Field AAPSM Conflict Detection and Correction. DATE (2005)
Xuan Zeng, Bang Liu, Jun Tao, Charles C. Chiang, Dian Zhou
A novel wavelet method for noise analysis of nonlinear circuits. ASP-DAC (2005)
Yangfeng Su, Jian Wang, Xuan Zeng, Zhaojun Bai, Charles C. Chiang, Dian Zhou
SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits. ICCAD (2004)
Jian Wang, Xuan Zeng, Wei Cai, Charles C. Chiang, Jiarong Tong, Dian Zhou
Frequency domain wavelet method with GMRES for large-scale linear circuit simulation. ISCAS (5) (2004)
Lihong Feng, Xuan Zeng, Charles C. Chiang, Dian Zhou, Qiang Fang
Direct Nonlinear Order Reduction with Variational Analysis. DATE (2004)
Xin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles C. Chiang
Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method. DATE (2004)
Jian Wang, Jun Tao, Xuan Zeng, Charles C. Chiang, Dian Zhou
Analog circuit behavioral modeling via wavelet collocation method with auto-companding. ASP-DAC (2004)
Lihong Feng, Xuan Zeng, Jiarong Tong, Charles C. Chiang, Dian Zhou
Two-sided projection method in variational equation model order reduction of nonlinear circuits. ISCAS (4) (2004)
Bo-Kyung Choi, Charles C. Chiang, Jamil Kawa, Majid Sarrafzadeh
Routing resources consumption on M-arch and X-arch. ISCAS (5) (2004)
Charles C. Chiang, Qing Su, Ching-Shoei Chiang
Wirelength reduction by using diagonal wire. ACM Great Lakes Symposium on VLSI (2003)
Charles C. Chiang, Chak-Kuen Wong, Majid Sarrafzadeh
A weighted Steiner tree-based global router with simultaneous length and density minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (12) (1994)
Charles C. Chiang
On wiring overlap layouts. Great Lakes Symposium on VLSI (1991)
Charles C. Chiang, Majid Sarrafzadeh, C. K. Wong
An optimal algorithm for rectilinear steiner trees for channels with obstacles. Int. J. Circuit Theory Appl. 19 (6) (1991)
Charles C. Chiang, Majid Sarrafzadeh, Chak-Kuen Wong
Global routing based on Steiner min-max trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (12) (1990)
Charles C. Chiang, Majid Sarrafzadeh, Chak-Kuen Wong
A powerful global router: based on Steiner min-max trees. ICCAD (1989)