Chandra Shekhar

Publication Activity (10 Years)

Years Active: 1992-2022
Publications (10 Years): 12

Top Topics

Fpga Implementation

Artificial Intelligence And Machine Learning

Thresholding Algorithm

Top Venues

Microprocess. Microsystems

Wirel. Pers. Commun.

Publications

Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
Area, Speed and Power Optimized Implementation of a Band-Pass FIR Filter Using High-Level Synthesis. Wirel. Pers. Commun. 127 (3) (2022)
Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
High-throughput field-programable gate array implementation of the advanced encryption standard algorithm for automotive security applications. J. Ambient Intell. Humaniz. Comput. 12 (7) (2021)
Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
High-speed and area-efficient Sobel edge detector on field-programmable gate array for artificial intelligence and machine learning applications. Comput. Intell. 37 (3) (2021)
Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
Power- and Area-Optimized High-Level Synthesis Implementation of a Digital Down Converter for Software-Defined Radio Applications. Circuits Syst. Signal Process. 40 (6) (2021)
Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
Real time FPGA implementation of a high speed and area optimized Harris corner detection algorithm. Microprocess. Microsystems 80 (2021)
Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
Speed optimal FPGA implementation of the encryption algorithms for telecom applications. Microprocess. Microsystems 79 (2020)
Prateek Sikka, Abhijit R. Asati, Chandra Shekhar
High-Level synthesis assisted design and verification framework for automotive radar processors. Microprocess. Microsystems 78 (2020)
Gaurav Purohit, Divya Vyas, Vinod Kumar Chaubey, Kota Solomon Raju, Chandra Shekhar
A New XOR-FREE Approach to Implement Walsh Sequences. Wirel. Pers. Commun. 109 (1) (2019)
Sanjay Singh, Atanendu Sekhar Mandal, Chandra Shekhar, Anil Vohra
Memory Efficient VLSI Implementation of Real-Time Motion Detection System Using FPGA Platform. J. Imaging 3 (2) (2017)
Sanjay Singh, Chandra Shekhar, Anil Vohra
Real-Time FPGA-Based Object Tracker with Automatic Pan-Tilt Features for Smart Video Surveillance Systems. J. Imaging 3 (2) (2017)
Jai Gopal Pandey, Arindam Karmakar, Chandra Shekhar, S. Gurunarayanan
An FPGA-Based Architecture for Local Similarity Measure for Image/Video Processing Applications. VLSI Design (2015)
Jai Gopal Pandey, Arindam Karmakar, Chandra Shekhar, S. Gurunarayanan
An embedded framework for accurate object localization using center of gravity measure with mean shift procedure. VDAT (2015)
Jai Gopal Pandey, Arindam Karmakar, Chandra Shekhar, S. Gurunarayanan
A Novel Architecture for FPGA Implementation of Otsu's Global Automatic Image Thresholding Algorithm. VLSI Design (2014)
Sanjay Singh, Ravi Saini, Sumeet Saurav, Anil K. Saini, Chandra Shekhar, Anil Vohra
FPGA-based real-time object tracker using modified particle filtering and SAD computation. VDAT (2014)
Sanjay Singh, Sumeet Saurav, Ravi Saini, Anil K. Saini, Chandra Shekhar, Anil Vohra
Automatic real-time extraction of focused regions in a live video stream using edge width information. VDAT (2014)
Alpana Agarwal, Chandra Shekhar
Synthesis of Analog IC Building Blocks. ISVLSI (2011)
Subhendu Kumar Sahoo, Anu Gupta, Abhijit R. Asati, Chandra Shekhar
A Novel Redundant Binary Number to Natural Binary Number Converter. J. Signal Process. Syst. 59 (3) (2010)
Sanjay Singh, Srinivasa Murali Dunga, Atanendu S. Mandal, Chandra Shekhar, Anil Vohra
Moving Object Tracking Using Object Segmentation. ICT (2010)
Subhendu Kumar Sahoo, Chandra Shekhar, Sudeepti Kodali, Abhijit R. Asati, Anu Gupta
Dual channel addition based FFT processor architecture for signal and image processing. Int. J. High Perform. Syst. Archit. 2 (1) (2009)
Abhijit R. Asati, Subhendu Kumar Sahoo, Chandra Shekhar
Selection of Optimum Device Size and Trans-Conductance Ratio for High Speed Digital CMOS Inverter Design for a Given Fanout Load. ICETET (2009)
Alpana Agarwal, Chandra Shekhar
Figure-of-Merit-Based Area-Constrained Design of Differential Amplifiers. VLSI Design 2008 (2008)
Subhendu Kumar Sahoo, Abhijit Ashati, Rasmita Sahoo, Chandra Shekhar
A High-Speed Radix-64 Parallel Multiplier Using a Novel Hardware Implementation Approach for Partial Product Generation Based on Redundant Binary Arithmetic. ICETET (2008)
A. Madan, S. C. Bose, P. J. George, Chandra Shekhar
Evaluation of Device Parameters of HfO2/SiO2/Si Gate Dielectric Stack for MOSFETs. VLSI Design (2005)
Chandra Shekhar, Raj Singh, A. S. Mandal, S. C. Bose, Ravi Saini, Pramod Tanwar
Application Specific Instruction Set Processors: Redefining Hardware-Software Boundary. VLSI Design (2004)
Ravi Saini, Pramod Tanwar, A. S. Mandal, S. C. Bose, Raj Singh, Chandra Shekhar
Design of an Application Specific Instruction Set Processor for Parametric Speech Synthesis. VLSI Design (2004)
B. Prasad, P. J. George, Chandra Shekhar
High Frequency Behaviour Of Electron Transport In Silicon And Its Implication For Drain Conductance Of Mos Transistors. VLSI Design (2001)
S. Srivastava, S. C. Bose, B. P. Mathur, Arti Noor, Raj Singh, A. S. Mandal, K. Prabhakaran, Arindam Karmakar, Chandra Shekhar, Sudhir Kumar, Amit K. Agarwal
Evolution of Architectural Concepts and Design Methods of Microprocessors. VLSI Design (1998)
K. V. S. H. Rao, Raj Singh, Chandra Shekhar
Using Dedicated Functional Simulator for ASIC Design in Indian Context. VLSI Design (1992)
Chandra Shekhar, A. S. Mandal
Design of an Efficient ASIC for the Control of Microwave Ovens. VLSI Design (1992)
K. V. S. H. Rao, A. Kansal, Chandra Shekhar, M. Srinivas, V. N. S. N. Rao
An ASIC for High Performance Stepper Motor Control. VLSI Design (1992)