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Prateek Sikka
ORCID
Publication Activity (10 Years)
Years Active: 2018-2022
Publications (10 Years): 9
Top Topics
Edge Localization
Fpga Implementation
Artificial Intelligence And Machine Learning
Corner Detection
Top Venues
Microprocess. Microsystems
Wirel. Pers. Commun.
Circuits Syst. Signal Process.
ICCCNT
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Publications
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Prateek Sikka
Hashed Access Policy-Based Secure Data Transmission Using SDHAK-ECC.
Int. J. Cooperative Inf. Syst.
31 (3&4) (2022)
Prateek Sikka
,
Abhijit R. Asati
,
Chandra Shekhar
Area, Speed and Power Optimized Implementation of a Band-Pass FIR Filter Using High-Level Synthesis.
Wirel. Pers. Commun.
127 (3) (2022)
Prateek Sikka
,
Abhijit R. Asati
,
Chandra Shekhar
High-throughput field-programable gate array implementation of the advanced encryption standard algorithm for automotive security applications.
J. Ambient Intell. Humaniz. Comput.
12 (7) (2021)
Prateek Sikka
,
Abhijit R. Asati
,
Chandra Shekhar
High-speed and area-efficient Sobel edge detector on field-programmable gate array for artificial intelligence and machine learning applications.
Comput. Intell.
37 (3) (2021)
Prateek Sikka
,
Abhijit R. Asati
,
Chandra Shekhar
Power- and Area-Optimized High-Level Synthesis Implementation of a Digital Down Converter for Software-Defined Radio Applications.
Circuits Syst. Signal Process.
40 (6) (2021)
Prateek Sikka
,
Abhijit R. Asati
,
Chandra Shekhar
Real time FPGA implementation of a high speed and area optimized Harris corner detection algorithm.
Microprocess. Microsystems
80 (2021)
Prateek Sikka
,
Abhijit R. Asati
,
Chandra Shekhar
Speed optimal FPGA implementation of the encryption algorithms for telecom applications.
Microprocess. Microsystems
79 (2020)
Prateek Sikka
,
Abhijit R. Asati
,
Chandra Shekhar
High-Level synthesis assisted design and verification framework for automotive radar processors.
Microprocess. Microsystems
78 (2020)
Sujoy Pandit
,
Prateek Sikka
Design and Implementation of Power Optimized Dual Core and Single Core DLX Processor on FPGA.
ICCCNT
(2018)