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Anu Gupta
ORCID
Publication Activity (10 Years)
Years Active: 2006-2024
Publications (10 Years): 13
Top Topics
Fpga Implementation
Median Filtering
Hough Transform
Differential Power Analysis
Top Venues
IET Image Process.
ICACCI
Int. J. Reconfigurable Comput.
ICSIPA
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Publications
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Abhinav Kathuria
,
Anu Gupta
,
R. K. Singla
Aspect-Oriented Lexicon-Based Sentiment Analysis of Students' Feedback.
J. Circuits Syst. Comput.
33 (3) (2024)
Jaswinder Singh
,
Anu Gupta
,
Preet Kanwal
The vital role of community in open source software development: A framework for assessment and ranking.
J. Softw. Evol. Process.
36 (7) (2024)
Abhinav Kathuria
,
Anu Gupta
,
R. K. Singla
AOH-Senti: Aspect-Oriented Hybrid Approach to Sentiment Analysis of Students' Feedback.
SN Comput. Sci.
4 (2) (2023)
Anu Gupta
,
Vijay Kumar Jain
,
Vikas Arya
,
Hemraj Verma
Consumer Green Consumption Behavior: A Myth or Reality in the Information Age? A Study Based on Bibliometric Analysis Approach.
Inf. Resour. Manag. J.
35 (2) (2022)
Vineet Kumar
,
Abhijit R. Asati
,
Anu Gupta
Dedicated hardware architecture for localizing iris in VW images.
J. King Saud Univ. Comput. Inf. Sci.
34 (7) (2022)
Meetha V. Shenoy
,
Smriti Sridhar
,
Girish Salaka
,
Anu Gupta
,
Rajiv Gupta
A Holistic Framework for Crime Prevention, Response, and Analysis With Emphasis on Women Safety Using Technology and Societal Participation.
IEEE Access
9 (2021)
Harjap Singh Saini
,
Anu Gupta
Differential Power Analysis Immune Design of FinFET Based Novel Differential Logic Gate.
ISCAS
(2019)
Harjap Saini
,
Anu Gupta
Constant power consumption design of novel differential logic gate for immunity against differential power analysis.
IET Circuits Devices Syst.
13 (1) (2019)
Vineet Kumar
,
Abhijit R. Asati
,
Anu Gupta
Memory-efficient architecture of circle Hough transform and its FPGA implementation for iris localisation.
IET Image Process.
12 (10) (2018)
Vineet Kumar
,
Abhijit R. Asati
,
Anu Gupta
Hardware Accelerators for Iris Localization.
J. Signal Process. Syst.
90 (4) (2018)
Vineet Kumar
,
Abhijit R. Asati
,
Anu Gupta
Low-latency median filter core for hardware implementation of 5 × 5 median filtering.
IET Image Process.
11 (10) (2017)
Vineet Kumar
,
Abhijit R. Asati
,
Anu Gupta
A Novel Edge-Map Creation Approach for Highly Accurate Pupil Localization in Unconstrained Infrared Iris Images.
J. Electr. Comput. Eng.
2016 (2016)
Indu Arora
,
Anu Gupta
Developing and validating virtualized transactional application of educational institutes using InFraMegh.
ICACCI
(2016)
Priya Gupta
,
Anu Gupta
,
Abhijit R. Asati
Leakage Immune Modified Pass Transistor Based 8T SRAM Cell in Subthreshold Region.
Int. J. Reconfigurable Comput.
2015 (2015)
Sneh Lata Murotiya
,
Anu Gupta
Design of High Speed Ternary Full Adder and Three-Input XOR Circuits Using CNTFETs.
VLSI Design
(2015)
Vineet Kumar
,
Abhijit R. Asati
,
Anu Gupta
An Iris localization method for noisy infrared iris images.
ICSIPA
(2015)
Sachin Maheshwari
,
Jimit Patel
,
Sumit K. Nirmalkar
,
Anu Gupta
Logical effort based power-delay-product optimization.
ICACCI
(2014)
Sachin Maheshwari
,
Rameez Raza
,
Pramod Kumar
,
Anu Gupta
Convex Optimization of Energy and Delay Using Logical Effort Method in Deep Sub-micron Technology.
VDAT
(2013)
Sachin Maheshwari
,
Himadri Singh Raghav
,
Anu Gupta
Characterization of Logical Effort for Improved Delay.
VDAT
(2013)
Anu Gupta
,
Subhrojyoti Sarkar
An Efficient High Frequency and Low Power Analog Multiplier in Current Domain.
VDAT
(2012)
Subhendu Kumar Sahoo
,
Anu Gupta
,
Abhijit R. Asati
,
Chandra Shekhar
A Novel Redundant Binary Number to Natural Binary Number Converter.
J. Signal Process. Syst.
59 (3) (2010)
Amit Agarkhed
,
Sharvil Patil
,
Anu Gupta
Improved Implementation of CRL and SCRL Gates for Ultra Low Power.
ARTCom
(2009)
Subhendu Kumar Sahoo
,
Chandra Shekhar
,
Sudeepti Kodali
,
Abhijit R. Asati
,
Anu Gupta
Dual channel addition based FFT processor architecture for signal and image processing.
Int. J. High Perform. Syst. Archit.
2 (1) (2009)
Ashutosh Mehra
,
Anu Gupta
,
Sharvil Patil
,
Abhishek Mehra
,
Subhendu Kumar Sahoo
A Novel Dynamic Current Boosting Technique for Enhancement of Settling Time and Elimination of Slewing of CMOS Amplifiers.
ARTCom
(2009)
Tushar Uttarwar
,
Sanket Jain
,
Anu Gupta
Design of a High Performance, Low Power, Fully Differential Telescopic Cascode Amplifier using Common-Mode Feedback Circuit.
EIAT/IETA
(2008)
Anu Gupta
,
Ravinder Kumar Singla
An Empirical Investigation of Defect Management in Free/Open Source Software Projects.
SCSS (1)
(2007)
Anu Gupta
,
Bipin Kulkarni
Automation of clock distribution network design for digital integrated circuits using divide and conquer technique.
Integr.
39 (4) (2006)