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Selection of Optimum Device Size and Trans-Conductance Ratio for High Speed Digital CMOS Inverter Design for a Given Fanout Load.
Abhijit R. Asati
Subhendu Kumar Sahoo
Chandra Shekhar
Published in:
ICETET (2009)
Keyphrases
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high speed
circuit design
low power
case study
low cost
power consumption
mixed signal
real time
frame rate
analog to digital converter
load balancing
design process
multi dimensional
control system
aspect ratio
optimum design
power reduction
evolutionary algorithm
metal oxide semiconductor
neural network