Bor-Doou Rong

Publication Activity (10 Years)

Years Active: 2015-2021
Publications (10 Years): 4

Top Topics

Mobile Terminals

Data Collection And Analysis

Ai Technologies

Top Venues

Comput. Commun.

Publications

Nicky Lu, Chun Shiah, Juang-Ying Chueh, Bor-Doou Rong, Wei-Jr Huang, Ho-Yin Chen, Cheng-Nan Chang, Chia-Wei Chang, Tzung-Shen Chen
Enhanced Core Circuits for scaling DRAM: 0.7V VCC with Long Retention 138ms at 125°C and Random Row/Column Access Times Accelerated by 1.5ns. VLSI Circuits (2021)
Dong-Uk Lee, Bor-Doou Rong, Kyu-Hyoun Kim
Session 25 Overview: DRAM Memory Subcommittee. ISSCC (2021)
Yao-Tung Tsou, Hao Zhen, Sy-Yen Kuo, Ching-Ray Chang, Akio Fukushima, Bor-Doou Rong
SPARR: Spintronics-based private aggregatable randomized response for crowdsourced data collection and analysis. Comput. Commun. 152 (2020)
Chun Shiah, C. N. Chang, Richard Crisp, C. P. Lin, C. N. Pan, C. P. Chuang, H. L. Chen, S. H. Jheng, T. F. Chang, W. J. Huang, K. C. Ting, Rick Dai, W. M. Huang, Bor-Doou Rong, Nicky Lu
A 4.8GB/s 256Mb(x16) Reduced-Pin-Count DRAM and Controller Architecture (RPCA) to Reduce Form-Factor & Cost for IOT/Wearable/TCON/Video/AI-Edge Systems. VLSI Circuits (2019)
Pei-Wen Luo, Chi-Kang Chen, Yu-Hui Sung, Wei Wu, Hsiu-Chuan Shih, Chia-Hsin Lee, Kuo-Hua Lee, Ming-Wei Li, Mei-Chiang Lung, Chun-Nan Lu, Yung-Fa Chou, Po-Lin Shih, Chung-Hu Ke, Chun Shiah, Patrick Stolt, Shigeki Tomishima, Ding-Ming Kwai, Bor-Doou Rong, Nicky Lu, Shih-Lien Lu, Cheng-Wen Wu
A computer designed half Gb 16-channel 819Gb/s high-bandwidth and 10ns low-latency DRAM for 3D stacked memory devices using TSVs. VLSIC (2015)