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A 4.8GB/s 256Mb(x16) Reduced-Pin-Count DRAM and Controller Architecture (RPCA) to Reduce Form-Factor & Cost for IOT/Wearable/TCON/Video/AI-Edge Systems.

Chun ShiahC. N. ChangRichard CrispC. P. LinC. N. PanC. P. ChuangH. L. ChenS. H. JhengT. F. ChangW. J. HuangK. C. TingRick DaiW. M. HuangBor-Doou RongNicky Lu
Published in: VLSI Circuits (2019)
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