Arun Subramaniyan

Publication Activity (10 Years)

Years Active: 2015-2023
Publications (10 Years): 23

Top Topics

Genome Sequencing

Top Venues

IEEE Trans. Computers

IEEE J. Solid State Circuits

Publications

Yufeng Gu, Arun Subramaniyan, Timothy Dunn, Alireza Khadem, Kuan-Yu Chen, Somnath Paul, Md. Vasimuddin, Sanchit Misra, David T. Blaauw, Satish Narayanasamy, Reetuparna Das
GenDP: A Framework of Dynamic Programming Acceleration for Genome Sequencing Analysis. ISCA (2023)
Charles Eckert, Arun Subramaniyan, Xiaowei Wang, Charles Augustine, Ravishankar Iyer, Reetuparna Das
Eidetic: An In-Memory Matrix Multiplication Accelerator for Neural Networks. IEEE Trans. Computers 72 (6) (2023)
Arun Subramaniyan, Yufeng Gu, Timothy Dunn, Somnath Paul, Md. Vasimuddin, Sanchit Misra, David T. Blaauw, Satish Narayanasamy, Reetuparna Das
GenomicsBench: A Benchmark Suite for Genomics. ISPASS (2021)
Arun Subramaniyan, Jack Wadden, Kush Goliya, Nathan Ozog, Xiao Wu, Satish Narayanasamy, David T. Blaauw, Reetuparna Das
Accelerated Seeding for Genome Sequence Alignment with Enumerated Radix Trees. ISCA (2021)
Zhehong Wang, Tianjun Zhang, Daichi Fujiki, Arun Subramaniyan, Xiao Wu, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, Reetuparna Das, Satish Narayanasamy, David T. Blaauw
A 2.46M Reads/s Seed-Extension Accelerator for Next-Generation Sequencing Using a String-Independent PE Array. IEEE J. Solid State Circuits 56 (3) (2021)
Zhehong Wang, Tianjun Zhang, Daichi Fujiki, Arun Subramaniyan, Xiao Wu, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, Reetuparna Das, Satish Narayanasamy, David T. Blaauw
A 2.46M reads/s Genome Sequencing Accelerator using a 625 Processing-Element Array. CICC (2020)
Jingcheng Wang, Xiaowei Wang, Charles Eckert, Arun Subramaniyan, Reetuparna Das, David T. Blaauw, Dennis Sylvester
A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing. IEEE J. Solid State Circuits 55 (1) (2020)
Xiao Wu, Arun Subramaniyan, Zhehong Wang, Satish Narayanasamy, Reetu Das, David T. Blaauw
17.3 GCUPS Pruning-Based Pair-Hidden-Markov-Model Accelerator for Next-Generation DNA Sequencing. VLSI Circuits (2020)
Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan, Dennis Sylvester, David T. Blaauw, Reetuparna Das, Ravi R. Iyer
Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks. IEEE Micro 39 (3) (2019)
Jingcheng Wang, Xiaowei Wang, Charles Eckert, Arun Subramaniyan, Reetuparna Das, David T. Blaauw, Dennis Sylvester
A Compute SRAM with Bit-Serial Integer/Floating-Point Operations for Programmable In-Memory Vector Acceleration. ISSCC (2019)
Daichi Fujiki, Arun Subramaniyan, Tianjun Zhang, Yu Zeng, Reetuparna Das, David T. Blaauw, Satish Narayanasamy
GenAx: A Genome Sequencing Accelerator. ISCA (2018)
Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan, Ravi R. Iyer, Dennis Sylvester, David T. Blaauw, Reetuparna Das
Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks. CoRR (2018)
Charles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan, Ravi R. Iyer, Dennis Sylvester, David T. Blaauw, Reetuparna Das
Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks. ISCA (2018)
Kevin Angstadt, Arun Subramaniyan, Elaheh Sadredini, Reza Rahimi, Kevin Skadron, Westley Weimer, Reetuparna Das
ASPEN: A Scalable In-SRAM Architecture for Pushdown Automata. MICRO (2018)
Arun Subramaniyan, Semeen Rehman, Muhammad Shafique, Akash Kumar, Jörg Henkel
Soft error-aware architectural exploration for designing reliability adaptive cache hierarchies in multi-cores. DATE (2017)
Arun Subramaniyan, Jingcheng Wang, Ezhil R. M. Balasubramanian, David T. Blaauw, Dennis Sylvester, Reetuparna Das
Cache automaton. MICRO (2017)
Arun Subramaniyan, Reetuparna Das
Parallel Automata Processor. ISCA (2017)
Muhammad Shafique, Semeen Rehman, Florian Kriebel, Muhammad Usman Karim Khan, Bruno Zatt, Arun Subramaniyan, Bruno Boessio Vizzotto, Jörg Henkel
Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding. IEEE Trans. Computers 66 (4) (2017)
Shaizeen Aga, Supreet Jeloka, Arun Subramaniyan, Satish Narayanasamy, David T. Blaauw, Reetuparna Das
Compute Caches. HPCA (2017)
Arun Subramaniyan, Jingcheng Wang, Ezhil R. M. Balasubramanian, David T. Blaauw, Dennis Sylvester, Reetuparna Das
Cache Automaton: Repurposing Caches for Automata Processing. PACT (2017)
Florian Kriebel, Semeen Rehman, Arun Subramaniyan, Segnon Jean Bruno Ahandagbe, Muhammad Shafique, Jörg Henkel
Reliability-Aware Adaptations for Shared Last-Level Caches in Multi-Cores. ACM Trans. Embed. Comput. Syst. 15 (4) (2016)
Nitin Chaturvedi, Arun Subramaniyan, S. Gurunarayanan
An adaptive migration-replication scheme (AMR) for shared cache in chip multiprocessors. J. Supercomput. 71 (10) (2015)
Florian Kriebel, Arun Subramaniyan, Semeen Rehman, Segnon Jean Bruno Ahandagbe, Muhammad Shafique, Jörg Henkel
Cache: Reliability-aware reconfigurable last-level cache architecture for multi-cores. CODES+ISSS (2015)