A Compute SRAM with Bit-Serial Integer/Floating-Point Operations for Programmable In-Memory Vector Acceleration.
Jingcheng WangXiaowei WangCharles EckertArun SubramaniyanReetuparna DasDavid T. BlaauwDennis SylvesterPublished in: ISSCC (2019)
Keyphrases
- floating point
- random access memory
- floating point arithmetic
- fixed point
- design considerations
- square root
- low voltage
- integer arithmetic
- digital signal processors
- memory bandwidth
- interval arithmetic
- instruction set
- low cost
- general purpose
- sparse matrices
- memory access
- embedded dram
- main memory
- power consumption
- flash memory
- high volume
- image matching
- bayesian networks