An efficient automatic test generation system for path delay faults in combinational circuits.
Ananta K. MajhiJames JacobLalit M. PatnaikVishwani D. AgrawalPublished in: VLSI Design (1995)
Keyphrases
- test generation
- test cases
- mutation testing
- test sequences
- symbolic execution
- logic circuits
- static analysis
- software testing
- shortest path
- power dissipation
- design automation
- high speed
- fault diagnosis
- test data generation
- test suite
- databases
- quality assurance
- test set
- database applications
- fault models
- multi agent systems