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Optimized march test flow for detecting memory faults in SRAM devices under bit line coupling.
Leonardo Bonet Zordan
Alberto Bosio
Luigi Dilillo
Patrick Girard
Serge Pravossoudovitch
Arnaud Virazel
Nabil Badereddine
Published in:
DDECS (2011)
Keyphrases
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random access memory
test cases
design considerations
memory usage
low voltage
mobile devices
power consumption
fault detection
memory requirements
limited memory
built in self test
memory access
memory size
flow patterns
mutation testing
embedded dram