TPG for Crosstalk Faults between On-Chip Aggressor and Victim Using Genetic Algorithms.
Kishore K. DuganapalliAjoy Kumar PalitWalter AnheierPublished in: DDECS (2015)
Keyphrases
- built in self test
- high speed
- analog vlsi
- low cost
- high density
- fault diagnosis
- genetic algorithm
- fault detection
- physical design
- fault model
- single chip
- fault detection and diagnosis
- programmable logic
- vlsi implementation
- solid models
- test cases
- multiple faults
- evolvable hardware
- integrated circuit
- high bandwidth
- correlation analysis
- multithreading
- database systems
- intrusion detection
- software systems
- host computer
- real time