High Launch Switching Activity Reduction in At-Speed Scan Testing Using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme.
Kohei MiyaseXiaoqing WenHiroshi FurukawaYuta YamatoSeiji KajiharaPatrick GirardLaung-Terng WangMohammad TehranipoorPublished in: IEICE Trans. Inf. Syst. (2010)