Yuanzhong (Paul) Zhou

Publication Activity (10 Years)

Years Active: 2005-2019
Publications (10 Years): 2

Top Topics

Literature Review

Accurate Classification

Top Venues

Microelectron. Reliab.

Microelectron. J.

Publications

Hang Li, Kalpathy B. Sundaram, Yuanzhong (Paul) Zhou, Javier A. Salcedo, Jean-Jacques Hajjar
Characterization and Modeling of the Transient Safe Operating Area in LDMOS Transistors. IRPS (2019)
Aihua Dong, Javier A. Salcedo, Srivatsan Parthasarathy, Yuanzhong (Paul) Zhou, Sirui Luo, Jean-Jacques Hajjar, Juin J. Liou
ESD protection structure with reduced capacitance and overshoot voltage for high speed interface applications. Microelectron. Reliab. 79 (2017)
Meng Miao, Yuanzhong (Paul) Zhou, Javier A. Salcedo, Jean-Jacques Hajjar, Juin J. Liou
Compact failure modeling for devices subject to electrostatic discharge stresses - A review pertinent to CMOS reliability simulation. Microelectron. Reliab. 55 (1) (2015)
Yunfeng Xi, Javier A. Salcedo, Yuanzhong (Paul) Zhou, Juin J. Liou, Jean-Jacques Hajjar
Design and characterization of ESD solutions with EMC robustness for automotive applications. Microelectron. Reliab. 55 (11) (2015)
Qiang Cui, Srivatsan Parthasarathy, Javier A. Salcedo, Juin J. Liou, Jean-Jacques Hajjar, Yuanzhong (Paul) Zhou
Design optimization of SiGe BiCMOS Silicon Controlled Rectifier for Charged Device Model (CDM) protection applications. Microelectron. Reliab. 54 (1) (2014)
Yuanzhong (Paul) Zhou, Alan W. Righter, Jean-Jacques Hajjar
Investigation on effectiveness of series gate resistor in CDM ESD protection designs. ASICON (2013)
Yuanzhong (Paul) Zhou, David Ellis, Jean-Jacques Hajjar, Andrew Olney, Juin J. Liou
: A new method for quantifying the effectiveness of ESD protection for the CDM classification test. Microelectron. Reliab. 53 (2) (2013)
Yuanzhong (Paul) Zhou, Javier A. Salcedo, Jean-Jacques Hajjar
Modeling of high voltage devices for ESD event simulation in SPICE. Microelectron. J. 43 (5) (2012)
Yuanzhong (Paul) Zhou, Duane Connerney, Ronald Carroll, Timwah Luk
Modeling MOS Snapback for Circuit-Level ESD Simulation Using BSIM3 and VBIC Models. ISQED (2005)