Yoriko Mizushima

Publication Activity (10 Years)

Years Active: 2011-2015
Publications (10 Years): 2

Top Topics

Manufacturing Process

Stress Distribution

Finite Element Model

Top Venues

IEICE Electron. Express

Publications

Tomoji Nakamura, Yoriko Mizushima, Young-Suk Kim, Ryuichi Sugie, Takayuki Ohba
Characterization of stress distribution in ultra-thinned DRAM wafer. 3DIC (2015)
Takayuki Ohba, Young-Suk Kim, Yoriko Mizushima, Nobuhide Maeda, Koji Fujimoto, Shoichi Kodama
Review of wafer-level three-dimensional integration (3DI) using bumpless interconnects for tera-scale generation. IEICE Electron. Express 12 (7) (2015)
Yoriko Mizushima, Young-Suk Kim, Tomoji Nakamura, Shoichi Kodama, Nobuhide Maeda, Koji Fujimoto, Takayuki Ohba
Impact of Thermomechanical Stresses on Ultra-thin Si Stacked Structure. 3DIC (2014)
Tadao Nakamura, Yoriko Mizushima, Hideki Kitada, Young-Suk Kim, Nobuhide Maeda, Shoichi Kodama, Ryuichi Sugie, Hiroshi Hashimoto, Akihito Kawai, Kazuhisa Arai, Akira Uedono, Takayuki Ohba
Influence of wafer thinning process on backside damage in 3D integration. 3DIC (2013)
Osamu Nakatsuka, Hideki Kitada, Young-Suk Kim, Yoriko Mizushima, Tomoji Nakamura, Takayuki Ohba, Shigeaki Zaima
Characterization of local strain around trough silicon via interconnects in wafer-on-wafer structures. 3DIC (2011)
Nobuhide Maeda, Young-Suk Kim, Y. Hikosaka, T. Eshita, Hideki Kitada, K. Fujimoto, Yoriko Mizushima, K. Suzuki, Tadao Nakamura, Akihito Kawai, Kazuhisa Arai, Takayuki Ohba
Development of ultra-thinning technology for logic and memory heterogeneous stack applications. 3DIC (2011)
Tomoji Nakamura, Hideki Kitada, Yoriko Mizushima, Nobuhide Maeda, Koji Fujimoto, Takayuki Ohba
Comparative study of side-wall roughness effects on leakage currents in through-silicon via interconnects. 3DIC (2011)