Characterization of stress distribution in ultra-thinned DRAM wafer.

Tomoji Nakamura Yoriko Mizushima Young-Suk Kim Ryuichi Sugie Takayuki Ohba

Published in: 3DIC (2015)

Keyphrases

stress distribution
finite element analysis
high speed
semiconductor manufacturing
main memory
integrated circuit
high density
low voltage
finite element model
material properties
von mises