Vyacheslav N. Yarmolik

Publication Activity (10 Years)

Years Active: 1983-2022
Publications (10 Years): 10

Top Topics

Random Access Memory

Top Venues

Autom. Control. Comput. Sci.

Fundam. Informaticae

Publications

Ireneusz Mrozek, Nikolai A. Shevchenko, Vyacheslav N. Yarmolik
Universal Address Sequence Generator for Memory Built-in Self-test. Fundam. Informaticae 188 (1) (2022)
Ireneusz Mrozek, N. A. Shevchenko, Vyacheslav N. Yarmolik
Universal Address Sequence Generator for Memory Built-in Self-test. CoRR (2022)
Ireneusz Mrozek, Vyacheslav N. Yarmolik
Transparent Memory Tests Based on the Double Address Sequences. Entropy 23 (7) (2021)
Eugenia Buslowska, Vyacheslav N. Yarmolik
Multi-Run March Tests for Pattern Sensitive Faults in RAM. EWDTS (2018)
Ireneusz Mrozek, Vyacheslav N. Yarmolik
Pseudo-Exhaustive Random Access Memory Testing Based on March Tests with Random Background Variation. EWDTS (2018)
Ireneusz Mrozek, Vyacheslav N. Yarmolik
Two-Run RAM March Testing with Address Decimation. J. Circuits Syst. Comput. 26 (2) (2017)
Ireneusz Mrozek, Vyacheslav N. Yarmolik
Optimal Controlled Random Tests. CISIM (2017)
Ireneusz Mrozek, Vyacheslav N. Yarmolik
Methods of Synthesis of Controlled Random Tests. CISIM (2016)
Ireneusz Mrozek, Vyacheslav N. Yarmolik
Multiple Controlled Random Testing. Fundam. Informaticae 144 (1) (2016)
Vyacheslav N. Yarmolik, Ireneusz Mrozek, Svetlana V. Yarmolik
Controlled method of random test synthesis. Autom. Control. Comput. Sci. 49 (6) (2015)
Vyacheslav N. Yarmolik, Svetlana V. Yarmolik
Address sequences. Autom. Control. Comput. Sci. 48 (4) (2014)
Ireneusz Mrozek, Vyacheslav N. Yarmolik
Iterative Antirandom Testing. J. Electron. Test. 28 (3) (2012)
Ireneusz Mrozek, Vyacheslav N. Yarmolik
Antirandom Test Vectors for BIST in Hardware/Software Systems. Fundam. Informaticae 119 (2) (2012)
S. V. Yarmolik, Vyacheslav N. Yarmolik
Generalized adaptive signature analysis. Autom. Control. Comput. Sci. 44 (4) (2010)
Ireneusz Mrozek, Vyacheslav N. Yarmolik, Eugenia Buslowska
Multi Background Memory Testing. CISIM (2008)
Ireneusz Mrozek, Vyacheslav N. Yarmolik
Optimal Backgrounds Selection for Multi Run Memory Testing. DDECS (2008)
Maciej Brzozowski, Vyacheslav N. Yarmolik
Obfuscation as Intellectual Rights Protection in VHDL Language. CISIM (2007)
Sergei B. Musin, Alexander A. Ivaniuk, Vyacheslav N. Yarmolik
Multiple Errors Detection Technique for RAM. DDECS (2007)
Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik
Efficient Online and Offline Testing of Embedded DRAMs. IEEE Trans. Computers 51 (7) (2002)
Vyacheslav N. Yarmolik, I. V. Bykov, Sybille Hellebrand, Hans-Joachim Wunderlich
Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms. EDCC (1999)
Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik
Error Detecting Refreshment for Embedded DRAMs. VTS (1999)
Sybille Hellebrand, Hans-Joachim Wunderlich, Vyacheslav N. Yarmolik
Symmetric Transparent BIST for RAMs. DATE (1999)
Serge N. Demidenko, Vincenzo Piuri, Vyacheslav N. Yarmolik, A. Shmidman
BIST Module for Mixed-Signal Circuits. DFT (1998)
Vyacheslav N. Yarmolik, Yuri V. Klimets, Serge N. Demidenko
March PS(23N) Test for DRAM Pattern-Sensitive Faults. Asian Test Symposium (1998)
Vyacheslav N. Yarmolik, Sybille Hellebrand, Hans-Joachim Wunderlich
Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs. DATE (1998)
Ad J. van de Goor, Georgi Gaydadjiev, Vyacheslav N. Yarmolik, V. G. Mikitjuk
March LA: a test for linked memory faults. ED&TC (1997)
Mark G. Karpovsky, Vyacheslav N. Yarmolik
Transparent random access memory testing for pattern sensitive faults. J. Electron. Test. 9 (3) (1996)
Ad J. van de Goor, Georgi Gaydadjiev, V. G. Mikitjuk, Vyacheslav N. Yarmolik
March LR: a test for realistic linked faults. VTS (1996)
O. Kebichi, Michael Nicolaidis, Vyacheslav N. Yarmolik
Exact Aliasing Computation for RAM BIST. ITC (1995)
Mark G. Karpovsky, Vyacheslav N. Yarmolik
Transparent Memory Testing for Pattern-Sensitive Faults. ITC (1994)
E. P. Kalosha, Vyacheslav N. Yarmolik, Mark G. Karpovsky
Signature Testability of PLA. FPL (1994)
Vyacheslav N. Yarmolik, Michael Nicolaidis, O. Kebichi
Aliasing-free Signature Analysis for RAM BIST. ITC (1994)
O. Kebichi, Vyacheslav N. Yarmolik, Michael Nicolaidis
Zero aliasing ROM BIST. J. Electron. Test. 5 (4) (1994)
Jan Havel, A. N. Morozevich, Vyacheslav N. Yarmolik
Generator of randomized pseudorandom numbers. Kybernetika 19 (1) (1983)