Tsung-Yi Wu

Publication Activity (10 Years)

Years Active: 1994-2023
Publications (10 Years): 2

Top Topics

Ultra Low Power

Motion Estimation

Wireless Data Broadcast

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Jian-Lin Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng
A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy. ISCAS (2023)
Jian-Lin Zeng, Tsung-Yi Wu, Don-Gey Liu, Ching-Hwa Cheng
Live Demonstration: A Low-Power Dual-Core Motion Estimation Chip Design and Validation for a Wireless Panoramic Endoscopy. ISCAS (2023)
Shin-Kai Chen, Chih-Wei Liu, Tsung-Yi Wu, An-Chi Tsai
Design and Implementation of High-Speed and Energy-Efficient Variable-Latency Speculating Booth Multiplier (VLSBM). IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2013)
Tsung-Yi Wu, Yi-Chieh Chang, Shang-Ti Chen, I-Tsun Chiang
A Preliminary Study on Using Augmented Virtuality to Improve Training for Intercollegiate Archers. DIGITEL (2012)
Tsung-Yi Wu, Tzi-Wei Kao, Shi-Yi Huang, Tai-Lun Li, How-Rern Lin
Combined use of rising and falling edge triggered clocks for peak current reduction in IP-based SoC designs. ASP-DAC (2010)
Tsung-Yi Wu, Tzi-Wei Kao, How-Rern Lin
Combined Use of Rising and Falling Edge Triggered Clocks for Peak Current Reduction in IP-Based SoC/NoC Designs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2010)
How-Rern Lin, Wei-Hao Chiu, Tsung-Yi Wu
A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino Gates. IEICE Trans. Electron. (4) (2009)
Tsung-Yi Wu, Liang-Ying Lu
Low-Leakage and Low-Power Implementation of High-Speed Logic Gates. IEICE Trans. Electron. (4) (2009)
Jiun-Kuan Wu, Tsung-Yi Wu, Liang-Ying Lu, Kuang-Yao Chen
IR Drop Reduction via a Flip-Flop Resynthesis Technique. ISQED (2008)
Tsung-Yi Wu, Jr-Luen Tzeng
A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2007)
Tsung-Yi Wu, Jr-Luen Tzeng, Kuang-Yao Chen
A Fast Probability-Based Algorithm for Leakage Current Reduction Considering Controller Cost. ASP-DAC (2007)
Nai-Yin Sung, Tsung-Yi Wu
A Method of Embedded Memory Access Time Measurement. ISQED (2001)
Youn-Long Lin, Tsung-Yi Wu
Storage optimization by replacing some flip-flops with latches. EURO-DAC (1996)
Tsung-Yi Wu, Youn-Long Lin
Register minimization beyond sharing among variables. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (12) (1996)
Tsung-Yi Wu, Youn-Long Lin
Register Minimization beyond Sharing among Variables. DAC (1995)
Tsung-Yi Wu, Tzu-Chieh Tien, Allen C.-H. Wu, Youn-Long Lin
A Synthesis Method for Mixed Synchronous / Asynchronous Behavior. EDAC-ETC-EUROASIC (1994)