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Shin-Kai Chen
Publication Activity (10 Years)
Years Active: 2005-2016
Publications (10 Years): 1
Top Topics
Real Valued
Memory Access
Low Error
Top Venues
ESTIMedia
IEEE Trans. Circuits Syst. I Regul. Pap.
ICPP Workshops
VLSI-DAT
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Publications
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Chih-Wei Liu
,
Shih-Hao Ou
,
Kuo-Chiang Chang
,
Tsung-Ching Lin
,
Shin-Kai Chen
A Low-Error, Cost-Efficient Design Procedure for Evaluating Logarithms to Be Used in a Logarithmic Arithmetic Processor.
IEEE Trans. Computers
65 (4) (2016)
Chia-Chen Hsu
,
Cheng-Yen Lin
,
Shin-Kai Chen
,
Chih-Wei Liu
,
Jenq Kuen Lee
Optimized memory access support for data layout conversion on heterogeneous multi-core systems.
ESTIMedia
(2014)
Shin-Kai Chen
,
Cheng-Yu Hung
,
Ching-Chih Chen
,
Chih-Wei Liu
Parallelizing Complex Streaming Applications on Distributed Scratchpad Memory Multicore Architecture.
Int. J. Parallel Program.
42 (6) (2014)
Tsung-Ching Lin
,
Shin-Kai Chen
,
Chih-Wei Liu
A low-error and Rom-free logarithmic arithmetic unit for embedded 3D graphics applications.
VLSI-DAT
(2013)
Shin-Kai Chen
,
Chih-Wei Liu
,
Tsung-Yi Wu
,
An-Chi Tsai
Design and Implementation of High-Speed and Energy-Efficient Variable-Latency Speculating Booth Multiplier (VLSBM).
IEEE Trans. Circuits Syst. I Regul. Pap.
(10) (2013)
Shin-Kai Chen
,
Sheng-Yun Wu
,
Yu-Kai Yen
,
Chih-Wei Liu
Early Stage Codesign of Multi-PE SIMD Engine: A Case Study on Object Detection.
ICPP Workshops
(2012)
Shin-Kai Chen
,
Tay-Jyi Lin
,
Chih-Wei Liu
Parallel object detection on multicore platforms.
SiPS
(2009)
Tay-Jyi Lin
,
Shin-Kai Chen
,
Yu-Ting Kuo
,
Chih-Wei Liu
,
Pi-Chen Hsiao
Design and Implementation of a High-Performance and Complexity-Effective VLIW DSP for Multimedia Applications.
J. Signal Process. Syst.
51 (3) (2008)
Shin-Kai Chen
,
Bing-Shiun Wang
,
Tay-Jyi Lin
,
Chih-Wei Liu
Rapid C to FPGA Prototyping with Multithreaded Emulation Engine.
ISCAS
(2007)
Chia-Hsien Liu
,
Tay-Jyi Lin
,
Chie-Min Chao
,
Pi-Chen Hsiao
,
Li-Chun Lin
,
Shin-Kai Chen
,
Chao-Wei Huang
,
Chih-Wei Liu
,
Chein-Wei Jen
Hierarchical instruction encoding for VLIW digital signal processors.
ISCAS (4)
(2005)
Tay-Jyi Lin
,
Chie-Min Chao
,
Chia-Hsien Liu
,
Pi-Chen Hsiao
,
Shin-Kai Chen
,
Li-Chun Lin
,
Chih-Wei Liu
,
Chein-Wei Jen
A unified processor architecture for RISC & VLIW DSP.
ACM Great Lakes Symposium on VLSI
(2005)