Tsung-Hsien Lin

Publication Activity (10 Years)

Years Active: 1998-2024
Publications (10 Years): 39

Top Topics

Piecewise Polynomial

Delta Sigma Modulators

Quantization Noise

Morphological Features

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Chia-Hsiang Chang, Pang-Cheng Chen, Hsiang-Chi Cheng, Chung-Hung Chen, Chun-Yen Lin, Chih-Ting Lin, Tsung-Hsien Lin
A VCO-Based Readout ADC for Quasi-Static Sensing Applications in 3-µm Low-Temperature Poly-Silicon Thin-Film Transistor Technology. ISCAS (2024)
Wei-En Lee, Tsung-Hsien Lin
A 0.6-V 12-bit Set-and-Down SAR ADC With a DAC-Based Bypass Window Switching Method. IEEE Trans. Circuits Syst. II Express Briefs 70 (9) (2023)
Tsung-Han Tsai, Yz-Heng Lin, Tsung-Hsien Lin
Motion Artifact Correction in MRI using GAN-Based Channel Attention Transformer. BioCAS (2023)
Tsung-Hsien Lin, Ying-Shuo Lee, Fu-Chieh Chang, J. Morris Chang, Pei-Yuan Wu
Protecting Sensitive Attributes by Adversarial Training Through Class-Overlapping Techniques. IEEE Trans. Inf. Forensics Secur. 18 (2023)
Mao-Ling Chiu, I-Fang Lo, Tsung-Hsien Lin
A Time-Domain CCM/DCM Current-Mode Buck Converter with a PI Compensator Incorporating an Infinite Phase Shift Delay Line. ESSCIRC (2023)
Chien-Liang Chen, Tsung-Hsien Lin
An Open-loop VCO-based ADC with Quasi-Chopping and Non-linearity Cancellation for Bio-Sensor Applications. BioCAS (2022)
Anna Zan, Zhong-Ru Xie, Yi-Chen Hsu, Yu-Hao Chen, Tsung-Hsien Lin, Yong-Shan Chang, Kuan Y. Chang
DeepFlu: a deep learning approach for forecasting symptomatic influenza A infection based on pre-exposure gene expression. Comput. Methods Programs Biomed. 213 (2022)
Chun-Yu Lin, Yu-Wei Huang, Tsung-Hsien Lin
A Temperature-Compensated Crystal Oscillator With Piecewise Polynomial Varactor Compensation Achieving ±3.75-ppm Inaccuracy From -30°C to 90°C. IEEE Trans. Circuits Syst. II Express Briefs 69 (4) (2022)
Sung-Nien Yu, I-Mei Lin, San-Yu Wang, Yi-Cheng Hou, Sheng-Po Yao, Chun-Ying Lee, Chai-Jan Chang, Chih-Sheng Chu, Tsung-Hsien Lin
Affective Computing Based on Morphological Features of Photoplethysmography for Patients with Hypertension. Sensors 22 (22) (2022)
Wei-En Lee, Chieh Tsou, Zhan-Xian Liao, Po-Yen Lu, Tsung-Hsien Lin, Shuenn-Yuh Lee, Chou-Ching K. Lin, Gia-Shing Shieh
Intelligent Wireless EEG Measurement System With Electrical and Optogenetic Stimulation for Epileptic Seizure Detection and Suppression. IEEE Access 9 (2021)
Chun-Yu Lin, Yu-Ting Hung, Tun-Ju Wang, Tsung-Hsien Lin
1.5mW 0.625-to-200MHz Fractional Output Divider with 120fsrms Jitter Based on Replica-DTC-Free Background Calibration. ISSCC (2021)
Yen-Ting Chen, Mao-Ling Chiu, How-Wei Teng, Tsung-Hsien Lin
A Hybrid Supply Modulator for 10-MHz LTE Power Amplifier with 17.3% PAE Improvement. VLSI-DAT (2021)
Chun-Yu Lin, Yu-Wei Huang, Tsung-Hsien Lin
A ± 20-ppm -50°C-105°C 1-µA 32.768-kHz Clock Generator with a System-HFXO-Assisted Background Calibration. A-SSCC (2021)
Chi-An Li, Wei-En Lee, Chi-Huan Lu, Sheng-Ying Lin, Tsung-Hsien Lin
A Single-Comparator Active Rectifier with Auto-Calibration in 0.18-μm CMOS. ISCAS (2020)
Zhen-Cheng Zhang, Chun-Yuan Chiu, Hsiang-Cheng Yuan, Tsung-Hsien Lin
A 0.5-V, 1.79-μW, 250-kbps Wake-up Receiver for IoT application in 90-nm CMOS. VLSI-DAT (2020)
Po-Yu Li, Wei-En Lee, Ching-Tzung Lin, Li-Te Wu, Tsung-Hsien Lin
A CMOS Temperature Sensor Based on a Chopped Continuous-Time Delta-Sigma Modulator. VLSI-DAT (2020)
Chun-Yu Lin, Tun-Ju Wang, Yu-Ting Hung, Tsung-Hsien Lin
A 1-200MHz Multiple Output Fractional Divider Using Phase Rotating Technique. VLSI-DAT (2020)
Chun-Yuan Chiu, Zhen-Cheng Zhang, Tsung-Hsien Lin
Design of a 0.6-V, 429-MHz FSK Transceiver Using Q-Enhanced and Direct Power Transfer Techniques in 90-nm CMOS. IEEE J. Solid State Circuits 55 (11) (2020)
Chun-Yu Lin, Yu-Ting Hung, Tsung-Hsien Lin
A 2.4-GHz 500-µW 370-fsrms Integrated Jitter Sub-Sampling Sub-Harmonically Injection-Locked PLL in 90-nm CMOS. A-SSCC (2019)
Deng-Kai Lin, Chih-Chan Tu, Shih-Kai Kuo, Tsung-Hsien Lin
An Analog Front-End Circuit for CO2 Sensor Readout in 0.18-µm CMOS Process. VLSI-DAT (2019)
Pei-Hsuan Huang, Chih-Chan Tu, Tsung-Hsien Lin
An Area-Efficient VCO-Based Hall Sensor Readout System for Autofocus Applications. ISCAS (2019)
Mao-Ling Chiu, Tzu-Hsuan Yang, Tsung-Hsien Lin
A High Accuracy Constant-On-Time Buck Converter with Spur-Free On-Time Generator. ISCAS (2019)
Mao-Ling Chiu, Tzu-Hsuan Yang, Tsung-Hsien Lin
A Transient-Enhanced Constant On-Time Buck Converter with Light-Load Efficiency Optimization. A-SSCC (2018)
Tsung-Hsien Lin, Chia-Hsiang Yang, Seung-Tak Ryu
Introduction to the Special Section on the 2017 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits 53 (10) (2018)
Chan-Hsiang Weng, Yung-Yu Lin, Tsung-Hsien Lin
A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator With a Feedback-Assisted Quantizer. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2017)
Chih-Chan Tu, Yu-Kai Wang, Tsung-Hsien Lin
A Low-Noise Area-Efficient Chopped VCO-Based CTDSM for Sensor Applications in 40-nm CMOS. IEEE J. Solid State Circuits 52 (10) (2017)
Chih-Chan Tu, Feng-Wen Lee, Han-Chun Chen, Yu-Kai Wang, Tsung-Hsien Lin
An area-efficient capacitively-coupled sensor readout circuit with current-splitting OTA and FIR-DAC. A-SSCC (2017)
Tzu-Ying Chen, Yi-Lin Tsai, Tsung-Hsien Lin
A current feedback instrumentation amplifier with chopping and dynamic element matching techniques and employing the current-reuse technique in input/feedback stages. VLSI-DAT (2017)
Chun-Yu Lin, Tun-Ju Wang, Tzu-Hsuan Liu, Tsung-Hsien Lin
An ultra-low power 169-nA 32.768-kHz fractional-N PLL. A-SSCC (2017)
Chun-Yuan Chiu, Zhen-Cheng Zhang, Tsung-Hsien Lin
A 0.6-V 200-kbps 429-MHz ultra-low-power FSK transceiver in 90-nm CMOS. A-SSCC (2017)
Sheng-Ying Lin, Tsung-Hsien Lin
An area-efficient amplifier-less digitally-controlled li-ion battery charger in 0.35μm CMOS. A-SSCC (2017)
Chun-Ta Wang, Hao-Hsiang Hou, Ping-Chien Chang, Keng-Hsien Lin, Cheng-Chang Li, Hung-Chang Jau, Yung-Jr Hung, Tsung-Hsien Lin
Widely tunable guided-mode resonance filter using 90° twisted liquid crystal cladding. OFC (2017)
Chun-Yu Lin, Tun-Ju Wang, Tsung-Hsien Lin
A 1.5-GHz sub-sampling fractional-N PLL for spread-spectrum clock generator in 0.18-μm CMOS. A-SSCC (2017)
Yi-Lin Tsai, Chun-Yu Lin, Bang-Cyuan Wang, Tsung-Hsien Lin
A 330-µW 400-MHz BPSK Transmitter in 0.18- µm CMOS for Biomedical Applications. IEEE Trans. Circuits Syst. II Express Briefs (5) (2016)
Tse-Wei Wang, Yi-Lin Tsai, Chong-Rong Lee, Fu-Lian Hung, Tsung-Hsien Lin
A 0.5-V sub-mW energy-efficient receiver in 0.18-μm CMOS for IoT applications. ISOCC (2016)
Chan-Hsiang Weng, Tzu-An Wei, Erkan Alpman, Chang-Tsung Fu, Tsung-Hsien Lin
A Continuous-Time Delta-Sigma Modulator Using ELD-Compensation-Embedded SAB and DWA-Inherent Time-Domain Quantizer. IEEE J. Solid State Circuits 51 (5) (2016)
Chih-Chan Tu, Yu-Kai Wang, Tsung-Hsien Lin
sensor readout circuit with chopped VCO-based CTDSM in 40-nm CMOS. A-SSCC (2016)
Chih-Chan Tu, Kuan-Chung Chen, Tsung-Yu Wu, Tsung-Hsien Lin
An area-efficient wideband CMOS hall sensor system for camera autofocus systems. A-SSCC (2016)
Chun-Yu Lin, Tsung-Hsien Lin
A 4-GHz ΔΣ fractional-N frequency synthesizer with 2-dimensional quantization noise pushing and fractional spur elimination techniques. A-SSCC (2016)
Chan-Hsiang Weng, Tzu-An Wei, Tsung-Hsien Lin
A 127 fJ/conv. continuous-time delta-sigma modulator with a DWA-embedded two-step time-domain quantizer. VLSI-DAT (2015)
Chan-Hsiang Weng, Wei-Hsiang Huang, Erkan Alpman, Tsung-Hsien Lin
A 13-MHz 68-dB SNDR CTDSM using SAB loop filter and interpolating flash quantizer with random-skip IDWA function in 90-nm CMOS. A-SSCC (2015)
Tsung-Hsien Lin, Carlo Samori, Richard Schreier
EP2: Lost art? Analog tricks and techniques from the masters. ISSCC (2015)
Yi-Lin Tsai, Feng-Wen Lee, Tzu-Ying Chen, Tsung-Hsien Lin
CCIA with an orthogonal frequency chopping technique. ISSCC (2015)
Chan-Hsiang Weng, Chun-Kuan Wu, Tsung-Hsien Lin
. IEEE J. Solid State Circuits 50 (11) (2015)
Yi-Lin Tsai, Jian-You Chen, Bang-Cyuan Wang, Tzu-Yu Yeh, Tsung-Hsien Lin
A 400MHz 10Mbps D-BPSK receiver with a reference-less dynamic phase-to-amplitude demodulation technique. VLSIC (2014)
Fu-Chien Huang, Shou-Chen Hsu, Yi-Lin Tsai, Yung-Yu Lin, Tsung-Hsien Lin
LMS-based digital background linearization technique for VCO-based delta-sigma ADC. MWSCAS (2014)
Chih-Chan Tu, Feng-Wen Lee, Tsung-Hsien Lin
An area-efficient capacitively-coupled instrumentation amplifier with a duty-cycled Gm-C DC servo loop in 0.18-μm CMOS. A-SSCC (2014)
Fu-Chien Huang, Bang-Cyuan Wang, Yi-Lin Tsai, Tsung-Hsien Lin
An Energy-Efficient QPSK Demodulation Scheme with Injection-Locking Technique for Green Radio Communication. iThings/GreenCom/CPSCom (2014)
Chun-Wei Tsai, Tsung-Hsien Lin, Ming-Chao Chiang
Automatic elastic net clustering algorithm. SMC (2014)
Chan-Hsiang Weng, Chun-Kuan Wu, Tsung-Hsien Lin
A CMOS thermistor-embedded continuous-time delta-sigma temperature sensor with a resolution of 0.01 °C. A-SSCC (2014)
Chan-Hsiang Weng, Tzu-An Wei, Erkan Alpman, Chang-Tsung Fu, Yi-Ting Tseng, Tsung-Hsien Lin
An 8.5MHz 67.2dB SNDR CTDSM with ELD compensation embedded twin-T SAB and circular TDC-based quantizer in 90nm CMOS. VLSIC (2014)
Chih-Chan Tu, Tsung-Hsien Lin
Analog front-end amplifier for ECG applications with feed-forward EOS cancellation. VLSI-DAT (2014)
Chen-Chien Lin, Chan-Hsiang Weng, Tzu-An Wei, Yung-Yu Lin, Tsung-Hsien Lin
A TDC-Based Two-Step Quantizer With Swapper Technique for a Multibit Continuous-Time Delta-Sigma Modulator. IEEE Trans. Circuits Syst. II Express Briefs (2) (2014)
Chih-Chan Tu, Feng-Wen Lee, Dong-Feng Yeih, Tsung-Hsien Lin
A 135-μW 0.46-mΩ/√Hz thoracic impedance variance monitor with square-wave current modulation. A-SSCC (2014)
Yu-Jie Huang, Che-Wei Huang, Tsung-Hsien Lin, Chih-Ting Lin, Li-Guang Chen, Po-Yun Hsiao, Bi-Ru Wu, Hsiao-Ting Hsueh, Bing-Jye Kuo, Hann-Huei Tsai, Hsin-Hao Liao, Ying-Zong Juang, Chorng-Kuang Wang, Shey-Shi Lu
A CMOS Cantilever-Based Label-Free DNA SoC With Improved Sensitivity for Hepatitis B Virus Detection. IEEE Trans. Biomed. Circuits Syst. 7 (6) (2013)
Yao-Hong Liu, Li-Guang Chen, Chun-Yu Lin, Tsung-Hsien Lin
A 650-pJ/bit MedRadio Transmitter With an FIR-Embedded Phase Modulator for Medical Micro-Power Networks (MMNs). IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2013)
Chen-Chien Lin, Chan-Hsiang Weng, Tsung-Hsien Lin
A low-power dual-mode continuous-time delta-sigma modulator with a folded quantizer. VLSI-DAT (2013)
Chun-Hong Lee, Hung-Chang Jau, Shih-Hui Chang, Tsung-Hsien Lin
Simulation of laser phenomenon of cholesteric liquid crystal using axuillary differential equation finite-difference time-domain method. WOCC (2012)
Shen-Iuan Liu, Tsung-Hsien Lin, Woogeun Rhee
Introduction to the Special Section on the 2011 Asian Solid-State Circuits Conference (A-SSCC). IEEE J. Solid State Circuits 47 (11) (2012)
Wei-Ning Liu, Tsung-Hsien Lin
An energy-efficient ultra-wideband transmitter with an FIR pulse-shaping filter. VLSI-DAT (2012)
Hung-Chang Jau, Tsung-Hsien Lin, Yan-Yu Chen, Chun-Wei Chen, Jui-Hsiang Liu, Andy Y.-G. Fuh
Electrical and optical switchings of the direcitons of cholesteric liquid crystals gratings. WOCC (2012)
Yi-Lin Tsai, Po-Yun Hsiao, Li-Guang Chen, Che-Wei Huang, Hsiao-Ting Hsueh, Chih-Chan Tu, Chih-Ting Lin, Shey-Shi Lu, Tsung-Hsien Lin
A sensor-merged oscillator-based readout circuit for pizeo-resistive sensing applications. BioCAS (2012)
Po-Yun Hsiao, Yao-Hong Liu, Tsung-Hsien Lin
An energy-efficient super-regenerative ASK receiver with a ΔΣ-based pulse-width demodulator. A-SSCC (2011)
Tsung-Hsien Lin, Chao-Ching Chi, Wei-Hao Chiu, Yu-Hsiang Huang
A Synchronous 50% Duty-Cycle Clock Generator in 0.35- μ m CMOS. IEEE Trans. Very Large Scale Integr. Syst. 19 (4) (2011)
Chan-Hsiang Weng, Chen-Chien Lin, Yu-Cheng Chang, Tsung-Hsien Lin
A 0.89-mW 1-MHz 62-dB SNDR Continuous-Time Delta-Sigma Modulator With an Asynchronous Sequential Quantizer and Digital Excess-Loop-Delay Compensation. IEEE Trans. Circuits Syst. II Express Briefs (12) (2011)
Chen-Yen Ho, Wei-Shan Chan, Yung-Yu Lin, Tsung-Hsien Lin
A Quadrature Bandpass Continuous-Time Delta-Sigma Modulator for a Tri-Mode GSM-EDGE/UMTS/DVB-T Receiver. IEEE J. Solid State Circuits 46 (11) (2011)
Yao-Hong Liu, Hao-Hung Lo, Li-Guang Chen, Tsung-Hsien Lin
A 15-mW 2.4-GHz IEEE 802.15.4 transmitter with a FIR-embedded phase modulator. A-SSCC (2011)
Yu-Cheng Chang, Wei-Hao Chiu, Chen-Chien Lin, Tsung-Hsien Lin
A 4MHz BW 69dB SNDR continuous-time delta-sigma modulator with reduced sensitivity to clock jitter. A-SSCC (2011)
Wei-Hao Chiu, Yu-Hsiang Huang, Tsung-Hsien Lin
A Dynamic Phase Error Compensation Technique for Fast-Locking Phase-Locked Loops. IEEE J. Solid State Circuits 45 (6) (2010)
Chen-Yen Ho, Yung-Yu Lin, Tsung-Hsien Lin
Dual-mode Continuous-Time Quadrature Bandpass ΔΣ modulator with Pseudo-random Quadrature mismatch shaping algorithm for Low-IF receiver application. ISCAS (2010)
Wei-Hao Chiu, Chien-Yuan Cheng, Tsung-Hsien Lin
A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS. ISCAS (2010)
Yao-Hong Liu, Tsung-Hsien Lin
A Delta-Sigma Pulse-Width Digitization Technique for Super-Regenerative Receivers. IEEE J. Solid State Circuits 45 (10) (2010)
Yao-Hong Liu, Tsung-Hsien Lin
A Wideband PLL-Based G/FSK Transmitter in 0.18 µm CMOS. IEEE J. Solid State Circuits 44 (9) (2009)
Tsung-Hsien Lin, Ching-Lung Ti, Yao-Hong Liu
Dynamic Current-Matching Charge Pump and Gated-Offset Linearization Technique for Delta-Sigma Fractional- N PLLs. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2009)
Yao-Hong Liu, Tsung-Hsien Lin
A 3.5-mW 15-Mbps O-QPSK transmitter for real-time wireless medical imaging applications. CICC (2008)
Ching-Lung Ti, Yao-Hong Liu, Tsung-Hsien Lin
A 2.4-GHz fractional-N PLL with a PFD/CP linearization and an improved CP circuit. ISCAS (2008)
Tsung-Hsien Lin, Chin-Kung Wu, Ming-Chung Tsai
A 0.8-V 0.25-mW Current-Mirror OTA With 160-MHz GBW in 0.18-μm CMOS. IEEE Trans. Circuits Syst. II Express Briefs (2) (2007)
Yao-Hong Liu, Tsung-Hsien Lin
An energy-efficient 1.5-Mbps wireless FSK transmitter with A ∑Δ-modulated phase rotator. ESSCIRC (2007)
Tsung-Hsien Lin, Yu-Jen Lai
An Agile VCO Frequency Calibration Technique for a 10-GHz CMOS PLL. IEEE J. Solid State Circuits 42 (2) (2007)
Wai-Chi Fang, Tsung-Hsien Lin
Low-Power Radio Design for Wireless Smart Sensor Networks. IIH-MSP (2006)
Tsung-Hsien Lin, William J. Kaiser, Gregory J. Pottie
Integrated low-power communication system design for wireless sensor networks. IEEE Commun. Mag. 42 (12) (2004)
Arya Behzad, Zhong Ming Shi, Seema Butala Anand, Li Lin, Keith A. Carter, Michael S. Kappes, Tsung-Hsien Lin, Thinh Nguyen, Dan Yuan, Stephen Wu, Y. C. Wong, Victor Fong, Ahmadreza Rofougaran
A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard. IEEE J. Solid State Circuits 38 (12) (2003)
Tsung-Hsien Lin, William J. Kaiser
A 900-MHz 2.5-mA CMOS frequency synthesizer with an automatic SC tuning loop. IEEE J. Solid State Circuits 36 (3) (2001)
Tsung-Hsien Lin, William J. Kaiser
A 900 MHz, 2.5 mA CMOS frequency synthesizer with an automatic SC tuning loop. CICC (2000)
Razieh Rofougaran, Tsung-Hsien Lin, William J. Kaiser
CMOS front-end LNA-mixer of micropower RF wireless systems. ISLPED (1999)
Tsung-Hsien Lin, Henry Sanchez, Razieh Rofougaran, William J. Kaiser
CMOS front end components for micropower RF wireless systems. ISLPED (1998)