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A 2.4-GHz 500-µW 370-fsrms Integrated Jitter Sub-Sampling Sub-Harmonically Injection-Locked PLL in 90-nm CMOS.
Chun-Yu Lin
Yu-Ting Hung
Tsung-Hsien Lin
Published in:
A-SSCC (2019)
Keyphrases
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high speed
power consumption
low cost
low power
nm technology
random sampling
cmos technology
power supply
sampling strategy
silicon on insulator
sampling algorithm
image sensor
vlsi circuits