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Toshihiro Minami
Publication Activity (10 Years)
Years Active: 1991-2007
Publications (10 Years): 0
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Publications
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Hiroe Iwasaki
,
Jiro Naganuma
,
Koyo Nitta
,
Ken Nakamura
,
Takeshi Yoshitome
,
Mitsuo Ogura
,
Yasuyuki Nakajima
,
Yutaka Tashiro
,
Takayuki Onishi
,
Mitsuo Ikeda
,
Toshihiro Minami
,
Makoto Endo
,
Yoshiyuki Yashima
Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level.
IEEE Trans. Very Large Scale Integr. Syst.
15 (9) (2007)
Mitsuo Ikeda
,
Toshio Kondo
,
Koyo Nitta
,
Kazuhito Suguri
,
Takeshi Yoshitome
,
Toshihiro Minami
,
Hiroe Iwasaki
,
Katsuyuki Ochiai
,
Jiro Naganuma
,
Makoto Endo
,
Yutaka Tashiro
,
Hiroshi Watanabe
,
Naoki Kobayashi
,
Tsuneo Okubo
,
Ryota Kasai
SuperENC: MPEG-2 video encoder chip.
IEEE Micro
19 (4) (1999)
Takeshi Yoshitome
,
Toshihiro Minami
,
Mitsuo Ikeda
,
Koyo Nitta
,
Kazuhito Suguri
A 4: 2: 2P@ML MPEG-2 video encoder board using an enhanced MP@ML video encoder LSI.
IEEE Trans. Consumer Electron.
45 (4) (1999)
Mitsuo Ikeda
,
Toshio Kondo
,
Koyo Nitta
,
Kazuhito Suguri
,
Takeshi Yoshitome
,
Toshihiro Minami
,
Jiro Naganuma
,
Takeshi Ogura
An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture.
DATE
(1999)
Kazuhito Suguri
,
Toshihiro Minami
,
Hiroaki Matsuda
,
Ritsu Kusaba
,
Toshio Kondo
,
Ryota Kasai
,
Takumi Watanabe
,
Hidenuri Sato
,
Nobutarou Shibata
,
Yutaka Tashiro
,
Takaaki Izuoka
,
Atsushi Shimizu
,
Hiroshi Kotera
A real-time motion estimation and compensation LSI with wide search range for MPEG2 video encoding.
IEEE J. Solid State Circuits
31 (11) (1996)
Toshio Kondo
,
Kazuhito Suguri
,
Mitsuo Ikeda
,
Tetsuya Abe
,
Hiroaki Matsuda
,
Tsuneo Okubo
,
Kenji Ogura
,
Yutaka Tashiro
,
Naoki Ono
,
Toshihiro Minami
,
Ritsu Kusaba
,
Takeshi Ikenaga
,
Nobutaro Shibata
,
Ryota Kasai
,
Koji Otsu
,
Fumiaki Nakagawa
,
Yasuhiko Sato
Two-chip MPEG-2 video encoder.
IEEE Micro
16 (2) (1996)
Hironori Yamauchi
,
Yutaka Tashiro
,
Toshihiro Minami
,
Yutaka Suzuki
Architecture and implementation of a highly parallel single-chip video DSP.
IEEE Trans. Circuits Syst. Video Technol.
2 (2) (1992)
Hironori Yamauchi
,
Yutaka Tashiro
,
Toshihiro Minami
,
Yutaka Suzuki
A highly-parallel single-chip DSP architecture for video signal processing.
ICASSP
(1991)
Yutaka Tashiro
,
Hironori Yamauchi
,
Toshihiro Minami
,
Tetsuo Tajiri
,
Yutaka Suzuki
An Organized Firmware Verification Environment for the Programmable Image DSP.
ITC
(1991)