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Mitsuo Ikeda
Publication Activity (10 Years)
Years Active: 1996-2018
Publications (10 Years): 2
Top Topics
Avc Video Coding Standard
Mode Decision
Video Encoder
Motion Estimation
Top Venues
ICCE
ICIP
VLSIC
ASP-DAC
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Publications
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Daisuke Kobayashi
,
Ken Nakamura
,
Takayuki Onishi
,
Yasuyuki Nakajima
,
Hiroe Iwasaki
,
Mitsuo Ikeda
,
Atsushi Shimizu
An HEVC real-time encoding system with high quality HDR color representations.
ICCE
(2018)
Takayuki Onishi
,
Takashi Sano
,
Yukikuni Nishida
,
Kazuya Yokohari
,
Ken Nakamura
,
Koyo Nitta
,
Kimiko Kawashima
,
Jun Okamoto
,
Naoki Ono
,
Atsushi Sagata
,
Hiroe Iwasaki
,
Mitsuo Ikeda
,
Atsushi Shimizu
A Single-Chip 4K 60-fps 4: 2: 2 HEVC Video Encoder LSI Employing Efficient Motion Estimation and Mode Decision Framework With Scalability to 8K.
IEEE Trans. Very Large Scale Integr. Syst.
26 (10) (2018)
Hiroe Iwasaki
,
Takayuki Onishi
,
Ken Nakamura
,
Koyo Nitta
,
Takashi Sano
,
Yukikuni Nishida
,
Kazuya Yokohari
,
Jia Su
,
Naoki Ono
,
Ritsu Kusaba
,
Atsushi Sagata
,
Mitsuo Ikeda
,
Atsushi Shimizu
Professional H.265/HEVC encoder LSI toward high-quality 4K/8K broadcast infrastructure.
Hot Chips Symposium
(2015)
Takayuki Onishi
,
Takashi Sano
,
Yukikuni Nishida
,
Kazuya Yokohari
,
Jia Su
,
Ken Nakamura
,
Koyo Nitta
,
Kimiko Kawashima
,
Jun Okamoto
,
Naoki Ono
,
Ritsu Kusaba
,
Atsushi Sagata
,
Hiroe Iwasaki
,
Mitsuo Ikeda
,
Atsushi Shimizu
Single-chip 4K 60fps 4: 2: 2 HEVC video encoder LSI with 8K scalability.
VLSIC
(2015)
Mitsuo Ikeda
H.265/HEVC encoder for UHDTV.
ASP-DAC
(2015)
Jia Su
,
Koyo Nitta
,
Mitsuo Ikeda
,
Atsushi Shimizu
Residue role assignment based transform partition predetermination on HEVC.
ICIP
(2013)
Mitsuo Ikeda
,
Takayuki Onishi
,
Takashi Sano
,
Atsushi Sagata
,
Hiroe Iwasaki
,
Yasuyuki Nakajima
,
Koyo Nitta
,
Yasuko Takahashi
,
Kazuya Yokohari
,
Daisuke Kobayashi
,
Kazuto Kamikura
,
Hirohisa Jozawa
MVC real-time video encoder for full-HDTV 3D video.
ICCE
(2012)
Koyo Nitta
,
Hiroe Iwasaki
,
Takayuki Onishi
,
Takashi Sano
,
Atsushi Sagata
,
Yasuyuki Nakajima
,
Minoru Inamori
,
Ryuichi Tanida
,
Atsushi Shimizu
,
Ken Nakamura
,
Mitsuo Ikeda
,
Jiro Naganuma
An H.264/AVC High422 Profile and MPEG-2 422 Profile Encoder LSI for HDTV Broadcasting Infrastructures.
IEICE Trans. Electron.
(4) (2012)
Takayuki Onishi
,
Takashi Sano
,
Koyo Nitta
,
Mitsuo Ikeda
,
Jiro Naganuma
Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI.
ISCAS
(2008)
Hiroe Iwasaki
,
Jiro Naganuma
,
Koyo Nitta
,
Ken Nakamura
,
Takeshi Yoshitome
,
Mitsuo Ogura
,
Yasuyuki Nakajima
,
Yutaka Tashiro
,
Takayuki Onishi
,
Mitsuo Ikeda
,
Toshihiro Minami
,
Makoto Endo
,
Yoshiyuki Yashima
Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level.
IEEE Trans. Very Large Scale Integr. Syst.
15 (9) (2007)
Takayuki Onishi
,
Mitsuo Ikeda
,
Jiro Naganuma
,
Makoto Endo
,
Yoshiyuki Yashima
Highly accurate de-jittering scheme for broadcast quality video transmission.
Systems and Computers in Japan
37 (10) (2006)
Minoru Inamori
,
Hiroe Iwasaki
,
Takayuki Onishi
,
Mitsuo Ikeda
,
Jiro Naganuma
,
Yoshiyuki Yashima
New set-top box for interactive visual communication of home entertainment using MPEG-2 full-duplex CODEC LSI.
IEEE Trans. Consumer Electron.
51 (2) (2005)
Takayuki Onishi
,
Mitsuo Ikeda
,
Jiro Naganuma
,
Makoto Endo
,
Yoshiyuki Yashima
A distributed TS-MUX architecture for multi-chip extension beyond the HDTV level.
ISCAS (2)
(2004)
Hiroe Iwasaki
,
Jiro Naganuma
,
Koyo Nitta
,
Ken Nakamura
,
Takeshi Yoshitome
,
Mitsuo Ogura
,
Yasuyuki Nakajima
,
Yutaka Tashiro
,
Takayuki Onishi
,
Mitsuo Ikeda
,
Makoto Endo
Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level.
DATE
(2003)
Hiroe Iwasaki
,
Jiro Naganuma
,
Yasuyuki Nakajima
,
Yutaka Tashiro
,
Ken Nakamura
,
Takeshi Yoshitome
,
Takayuki Onishi
,
Mitsuo Ikeda
,
Takaaki Izuoka
,
Makoto Endo
A 1.1 W single-chip MPEG-2 HDTV codec LSI for embedding in consumer-oriented mobile codec systems.
CICC
(2003)
Ken Nakamura
,
Mitsuo Ikeda
,
Takeshi Yoshitome
,
Takeshi Ogura
Global Rate Control Scheme for MPEG-2 HDTV Parallel Encoding System.
ITCC
(2000)
Tsuneo Okubo
,
Mitsuo Ikeda
,
Yutaka Tashiro
,
Toshio Kondo
,
Ryota Kasai
,
Hiroshi Kotera
,
Tetsuma Sakurai
Concurrent and collaborative methodologies in short TAT LSI design and manufacturing.
Systems and Computers in Japan
30 (7) (1999)
Mitsuo Ikeda
,
Toshio Kondo
,
Koyo Nitta
,
Kazuhito Suguri
,
Takeshi Yoshitome
,
Toshihiro Minami
,
Hiroe Iwasaki
,
Katsuyuki Ochiai
,
Jiro Naganuma
,
Makoto Endo
,
Yutaka Tashiro
,
Hiroshi Watanabe
,
Naoki Kobayashi
,
Tsuneo Okubo
,
Ryota Kasai
SuperENC: MPEG-2 video encoder chip.
IEEE Micro
19 (4) (1999)
Takeshi Yoshitome
,
Toshihiro Minami
,
Mitsuo Ikeda
,
Koyo Nitta
,
Kazuhito Suguri
A 4: 2: 2P@ML MPEG-2 video encoder board using an enhanced MP@ML video encoder LSI.
IEEE Trans. Consumer Electron.
45 (4) (1999)
Mitsuo Ikeda
,
Toshio Kondo
,
Koyo Nitta
,
Kazuhito Suguri
,
Takeshi Yoshitome
,
Toshihiro Minami
,
Jiro Naganuma
,
Takeshi Ogura
An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture.
DATE
(1999)
Mitsuo Ikeda
,
Tsuneo Okubo
,
Tetsuya Abe
,
Yoshinori Ito
,
Yutaka Tashiro
,
Ryota Kasai
A Hardware/Software Concurrent Design for a Real-Time SP@ML MPEG2 Video-Encoder Chip Set.
ED&TC
(1996)
Toshio Kondo
,
Kazuhito Suguri
,
Mitsuo Ikeda
,
Tetsuya Abe
,
Hiroaki Matsuda
,
Tsuneo Okubo
,
Kenji Ogura
,
Yutaka Tashiro
,
Naoki Ono
,
Toshihiro Minami
,
Ritsu Kusaba
,
Takeshi Ikenaga
,
Nobutaro Shibata
,
Ryota Kasai
,
Koji Otsu
,
Fumiaki Nakagawa
,
Yasuhiko Sato
Two-chip MPEG-2 video encoder.
IEEE Micro
16 (2) (1996)