A highly-parallel single-chip DSP architecture for video signal processing.
Hironori YamauchiYutaka TashiroToshihiro MinamiYutaka SuzukiPublished in: ICASSP (1991)
Keyphrases
- highly parallel
- signal processing
- single chip
- low power
- hardware implementation
- low cost
- real time
- multimedia
- pattern recognition
- image processing
- video data
- video sequences
- computer vision
- parallel architectures
- computing systems
- efficient implementation
- image formation
- single pass
- high speed
- power consumption
- cloud computing
- data flow
- massively parallel
- computer architecture
- graphics processing units
- image sensor
- moving objects