Subho Chatterjee

Publication Activity (10 Years)

Years Active: 2008-2015
Publications (10 Years): 2

Top Topics

Learning Environment

Multiresolution

Data Aggregation

Power Consumption

Top Venues

IEEE J. Emerg. Sel. Topics Circuits Syst.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Wen Yueh, Subho Chatterjee, Muneeb Zia, Swarup Bhunia, Saibal Mukhopadhyay
A Memory-Based Logic Block With Optimized-for-Read SRAM for Energy-Efficient Reconfigurable Computing Fabric. IEEE Trans. Circuits Syst. II Express Briefs (6) (2015)
Kaushik Roy, Deliang Fan, Xuanyao Fong, Yusung Kim, Mrigank Sharad, Somnath Paul, Subho Chatterjee, Swarup Bhunia, Saibal Mukhopadhyay
Exploring Spin Transfer Torque Devices for Unconventional Computing. IEEE J. Emerg. Sel. Topics Circuits Syst. 5 (1) (2015)
Subho Chatterjee, Pramod Kolar, Wei Jian Chan, Jae Y. Ko, Gunjan H. Pandya
A methodology for yield-specific leakage estimation in memory. CICC (2014)
Subho Chatterjee, Sayeef S. Salahuddin, Satish Kumar, Saibal Mukhopadhyay
Electrothermal analysis of spin-transfer-torque random access memory arrays. ACM J. Emerg. Technol. Comput. Syst. 9 (2) (2013)
Wen Yueh, Subho Chatterjee, Amit Ranjan Trivedi, Saibal Mukhopadhyay
On the parametric failures of SRAM in a 3D-die stack considering tier-to-tier supply cross-talk. VTS (2012)
Somnath Paul, Subho Chatterjee, Saibal Mukhopadhyay, Swarup Bhunia
Energy-Efficient Reconfigurable Computing Using a Circuit-Architecture-Software Co-Design Approach. IEEE J. Emerg. Sel. Topics Circuits Syst. 1 (3) (2011)
Subho Chatterjee, Mitchelle Rasquinha, Sudhakar Yalamanchili, Saibal Mukhopadhyay
A Scalable Design Methodology for Energy Minimization of STTRAM: A Circuit and Architecture Perspective. IEEE Trans. Very Large Scale Integr. Syst. 19 (5) (2011)
Aritra Banerjee, Subho Chatterjee, Azad Naeemi, Abhijit Chatterjee
Power Aware Post-manufacture Tuning of Analog Nanocircuits. ETS (2011)
Subho Chatterjee, Sayeef S. Salahuddin, Saibal Mukhopadhyay
Dual-Source-Line-Bias Scheme to Improve the Read Margin and Sensing Accuracy of STTRAM in Sub-90-nm Nodes. IEEE Trans. Circuits Syst. II Express Briefs (3) (2010)
Subho Chatterjee, Sayeef S. Salahuddin, Satish Kumar, Saibal Mukhopadhyay
Analysis of thermal behaviors of spin-torque-transfer RAM: a simulation study. ISLPED (2010)
Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatterjee, Saibal Mukhopadhyay, Sudhakar Yalamanchili
An energy efficient cache design using spin torque transfer (STT) RAM. ISLPED (2010)
Somnath Paul, Subho Chatterjee, Saibal Mukhopadhyay, Swarup Bhunia
A circuit-software co-design approach for improving EDP in reconfigurable frameworks. ICCAD (2009)
Subho Chatterjee, Mitchelle Rasquinha, Sudhakar Yalamanchili, Saibal Mukhopadhyay
A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies. ICCAD (2009)
Amal Kumar Kundu, Subho Chatterjee, Tarun Kanti Bhattacharyya
A Fast Settling 100dB OPAMP in 180nm CMOS Process with Compensation Based Optimisation. VLSI Design (2008)
Amitava Banerjee, Subho Chatterjee, Amit Patra, Siddhartha Mukhopadhyay
An efficient approach to model distortion in weakly nonlinear Gm - C filters. ISCAS (2008)