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Shu-Yu Jiang
Publication Activity (10 Years)
Years Active: 2001-2011
Publications (10 Years): 0
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Publications
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Kuo-Hsing Cheng
,
Jen-Chieh Liu
,
Chih-Yu Chang
,
Shu-Yu Jiang
,
Kai-Wei Hong
Built-in Jitter Measurement Circuit With Calibration Techniques for a 3-GHz Clock Generator.
IEEE Trans. Very Large Scale Integr. Syst.
19 (8) (2011)
Shu-Yu Jiang
,
Kuo-Hsing Cheng
,
Pei-Yi Jian
A 2.5-GHz Built-in Jitter Measurement System in a Serial-Link Transceiver.
IEEE Trans. Very Large Scale Integr. Syst.
17 (12) (2009)
Shu-Yu Jiang
,
Chan-Wei Huang
,
Yu-Lung Lo
,
Kuo-Hsing Cheng
Vernier Caliper and Equivalent-Signal Sampling for Built-In Jitter Measurement System.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2009)
Kuo-Hsing Cheng
,
Chan-Wei Huang
,
Shu-Yu Jiang
Self-sampled vernier delay line for built-in clock jitter measurement.
ISCAS
(2006)
Kuo-Hsing Cheng
,
Shu-Ming Chang
,
Shu-Yu Jiang
,
Wei-Bin Yang
A 2GHz fully differential DLL-based frequency multiplier for high speed serial link circuit.
ISCAS (2)
(2005)
Kuo-Hsing Cheng
,
Chia-Hung Wei
,
Shu-Yu Jiang
Static divided word matching line for low-power Content Addressable Memory design.
ISCAS (2)
(2004)
Kuo-Hsing Cheng
,
Shu-Yu Jiang
,
Zong-Shen Chen
BIST for clock jitter measurements.
ISCAS (5)
(2003)
Kuo-Hsing Cheng
,
Tse-Hua Yao
,
Shu-Yu Jiang
,
Wei-Bin Yang
A difference detector PFD for low jitter PLL.
ICECS
(2001)