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A 2GHz fully differential DLL-based frequency multiplier for high speed serial link circuit.

Kuo-Hsing ChengShu-Ming ChangShu-Yu JiangWei-Bin Yang
Published in: ISCAS (2) (2005)
Keyphrases
  • high speed
  • low power
  • frame rate
  • high speed networks
  • real time
  • hardware implementation
  • frequency response
  • link structure
  • evolutionary algorithm
  • signal processing
  • sat solvers
  • max sat