Nigel P. Topham

Publication Activity (10 Years)

Years Active: 1985-2023
Publications (10 Years): 10

Top Topics

Instruction Set

Ultra Low Power

Memory Hierarchy

Top Venues

Int. J. Parallel Program.

Publications

Heba Salem, Nigel P. Topham
Run-time integrity monitoring of untrustworthy analog front-ends. DATE (2023)
Heba Salem, Nigel P. Topham
Detecting denial-of-service hardware Trojans in DRAM-based memory systems. ICECS (2021)
Heba Salem, Nigel P. Topham
Trustworthy computing on untrustworthy and Trojan-infected on-chip interconnects. ETS (2021)
Martin Kristien, Tom Spink, Brian Campbell, Susmit Sarkar, Ian Stark, Björn Franke, Igor Böhm, Nigel P. Topham
Fast and Correct Load-Link/Store-Conditional Instruction Handling in DBT Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (11) (2020)
Martin Kristien, Tom Spink, Harry Wagstaff, Björn Franke, Igor Böhm, Nigel P. Topham
Mitigating JIT compilation latency in virtual execution environments. VEE (2019)
Saumay Dublish, Vijay Nagarajan, Nigel P. Topham
Poise: Balancing Thread-Level Parallelism and Memory System Performance in GPUs Using Machine Learning. HPCA (2019)
Christopher Thompson, Miles Gould, Nigel P. Topham
High Speed Cycle-Approximate Simulation of Embedded Cache-Incoherent and Coherent Chip-Multiprocessors. Int. J. Parallel Program. 46 (6) (2018)
Saumay Dublish, Vijay Nagarajan, Nigel P. Topham
Evaluating and mitigating bandwidth bottlenecks across the memory hierarchy in GPUs. ISPASS (2017)
Saumay Dublish, Vijay Nagarajan, Nigel P. Topham
Characterizing memory bottlenecks in GPGPU workloads. IISWC (2016)
Saumay Dublish, Vijay Nagarajan, Nigel P. Topham
Cooperative Caching for GPUs. ACM Trans. Archit. Code Optim. 13 (4) (2016)
Luigi Nardi, Bruno Bodin, M. Zeeshan Zia, John Mawer, Andy Nisbet, Paul H. J. Kelly, Andrew J. Davison, Mikel Luján, Michael F. P. O'Boyle, Graham D. Riley, Nigel P. Topham, Stephen B. Furber
Introducing SLAMBench, a performance and accuracy benchmarking methodology for SLAM. ICRA (2015)
Tom Spink, Harry Wagstaff, Björn Franke, Nigel P. Topham
Efficient dual-ISA support in a retargetable, asynchronous Dynamic Binary Translator. SAMOS (2015)
Tom Spink, Harry Wagstaff, Björn Franke, Nigel P. Topham
Efficient code generation in a region-based dynamic binary translator. LCTES (2014)
Luigi Nardi, Bruno Bodin, M. Zeeshan Zia, John Mawer, Andy Nisbet, Paul H. J. Kelly, Andrew J. Davison, Mikel Luján, Michael F. P. O'Boyle, Graham D. Riley, Nigel P. Topham, Steve B. Furber
Introducing SLAMBench, a performance and accuracy benchmarking methodology for SLAM. CoRR (2014)
Karthik T. Sundararajan, Timothy M. Jones, Nigel P. Topham
RECAP: Region-Aware Cache Partitioning. ICCD (2013)
Christopher Thompson, Miles Gould, Nigel P. Topham
High speed cycle approximate simulation for cache-incoherent MPSoCs. ICSAMOS (2013)
Oscar Almer, Igor Böhm, Tobias J. K. Edler von Koch, Björn Franke, Stephen C. Kyle, Volker Seeker, Christopher Thompson, Nigel P. Topham
A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation. Int. J. Parallel Program. 41 (2) (2013)
Karthik T. Sundararajan, Timothy M. Jones, Nigel P. Topham
The Smart Cache: An Energy-Efficient Cache Architecture Through Dynamic Adaptation. Int. J. Parallel Program. 41 (2) (2013)
Harry Wagstaff, Miles Gould, Björn Franke, Nigel P. Topham
Early partial evaluation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description. DAC (2013)
Marcela Zuluaga, Edwin V. Bonilla, Nigel P. Topham
Predicting best design trade-offs: A case study in processor customization. DATE (2012)
Karthik T. Sundararajan, Vasileios Porpodas, Timothy M. Jones, Nigel P. Topham, Björn Franke
Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs. HPCA (2012)
Stephen C. Kyle, Igor Böhm, Björn Franke, Hugh Leather, Nigel P. Topham
Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation. LCTES (2012)
Matthew Bielby, Miles Gould, Nigel P. Topham
Design Space Exploration of Hybrid Ultra Low Power Branch Predictors. ARCS (2012)
Karthik T. Sundararajan, Timothy M. Jones, Nigel P. Topham
Energy-efficient cache partitioning for future CMPs. PACT (2012)
Karthik T. Sundararajan, Timothy M. Jones, Nigel P. Topham
A reconfigurable cache architecture for energy efficiency. Conf. Computing Frontiers (2011)
Oscar Almer, Nigel P. Topham, Björn Franke
A Learning-Based Approach to the Automated Design of MPSoC Networks. ARCS (2011)
Karthik T. Sundararajan, Timothy M. Jones, Nigel P. Topham
Smart cache: A self adaptive cache architecture for energy efficiency. ICSAMOS (2011)
Rainer Leupers, Lieven Eeckhout, Grant Martin, Frank Schirrmeister, Nigel P. Topham, Xiaotao Chen
Virtual Manycore platforms: Moving towards 100+ processor cores. DATE (2011)
Igor Böhm, Tobias J. K. Edler von Koch, Stephen C. Kyle, Björn Franke, Nigel P. Topham
Generalized just-in-time trace compilation using a parallel task farm in a dynamic binary translator. PLDI (2011)
Oscar Almer, Igor Böhm, Tobias J. K. Edler von Koch, Björn Franke, Stephen C. Kyle, Volker Seeker, Christopher Thompson, Nigel P. Topham
Scalable multi-core simulation using parallel dynamic binary translation. ICSAMOS (2011)
Oscar Almer, Miles Gould, Björn Franke, Nigel P. Topham
Selecting the optimal system: automated design of application-specific systems-on-chip. NoCArc@MICRO (2011)
Igor Böhm, Björn Franke, Nigel P. Topham
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator. ICSAMOS (2010)
Marcela Zuluaga, Nigel P. Topham
Exploring the unified design-space of custom-instruction selection and resource sharing. ICSAMOS (2010)
Alastair Colin Murray, Richard Vincent Bennett, Björn Franke, Nigel P. Topham
Code transformation and instruction set extension. ACM Trans. Embed. Comput. Syst. 8 (4) (2009)
Daniel Jones, Nigel P. Topham
High Speed CPU Simulation Using LTU Dynamic Binary Translation. HiPEAC (2009)
Marcela Zuluaga, Nigel P. Topham
Design-Space Exploration of Resource-Sharing Solutions for Custom Instruction Set Extensions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (12) (2009)
Marcela Zuluaga, Theo Kluter, Philip Brisk, Nigel P. Topham, Paolo Ienne
Introducing control-flow inclusion to support pipelining in custom instruction set extensions. SASP (2009)
Marcela Zuluaga, Nigel P. Topham
Resource Sharing in Custom Instruction Set Extensions. SASP (2008)
Rahman Hassan, Antony Harris, Nigel P. Topham, Aristides Efthymiou
Synthetic Trace-Driven Simulation of Cache Memory. AINA Workshops (1) (2007)
Richard Vincent Bennett, Alastair Colin Murray, Björn Franke, Nigel P. Topham
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration of embedded systems. LCTES (2007)
Kar-Lik Wong, Nigel P. Topham
High performance IDCT realization using complex arithmetic. ICASSP (2) (2003)
Kar-Lik Wong, Nigel P. Topham
OneDSP: A unifying DSP architecture for Systems-on-a-Chip. ICASSP (2002)
José-Lorenzo Cruz, Antonio González, Mateo Valero, Nigel P. Topham
Multiple-banked register file architectures. ISCA (2000)
Marcio Merino Fernandes, Josep Llosa, Nigel P. Topham
Distributed Modulo Scheduling. HPCA (1999)
Nigel P. Topham, Antonio González
Randomized Cache Placement for Eliminating Conflicts. IEEE Trans. Computers 48 (2) (1999)
Nigel P. Topham
Experiencing quantitative computer architecture. WCAE@ISCA (1998)
Marcio Merino Fernandes, Josep Llosa, Nigel P. Topham
Partitioned Schedules for Clustered VLIW Architectures. IPPS/SPDP (1998)
G. P. Jones, Nigel P. Topham
A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine. MICRO (1997)
Nigel P. Topham, Antonio González, José González
The Design and Performance of a Conflict-Avoiding Cache. MICRO (1997)
G. P. Jones, Nigel P. Topham
A Limitation Study into Access Decoupling. Euro-Par (1997)
Marcio Merino Fernandes, Josep Llosa, Nigel P. Topham
Allocating Lifetimes to Queues in Software Pipelined Architectures. Euro-Par (1997)
G. P. Jones, Nigel P. Topham
The Effect of Restricted Instruction Issue Width on an Access Decoupled Architecture. PARCO (1997)
Antonio González, Mateo Valero, Nigel P. Topham, Joan-Manuel Parcerisa
Eliminating Cache Conflict Misses through XOR-Based Placement Functions. International Conference on Supercomputing (1997)
Sathiamoorthy Manoharan, Nigel P. Topham
An Assessment of Assignment Schemes for Dependency Graphs. Parallel Comput. 21 (1) (1995)
Nigel P. Topham, Alasdair Rawsthorne, Callum McLean, Muriel Mewissen, Peter L. Bird
Compiling and Optimizing for Decoupled Architectures. SC (1995)
Nigel P. Topham, Kenneth McDougall
Performance of the decoupled ACRI-1 architecture: the perfect club. HPCN Europe (1995)
Sathiamoorthy Manoharan, Nigel P. Topham, A. W. R. Crawford
Trace-Driven Simulation of Decoupled Architectures. HICSS (1) (1994)
Peter L. Bird, Alasdair Rawsthorne, Nigel P. Topham
The Effectiveness of Decoupling. International Conference on Supercomputing (1993)
Roberto A. Hexsel, Nigel P. Topham
The Performance of Parallel Loops on SCI-Based Memory Hierarchies. PARCO (1993)
T. Harris, Nigel P. Topham
Performance of Weak Consistency Schemes on the DEC Alpha. PARCO (1993)
Peter L. Bird, Nigel P. Topham, Sathiamoorthy Manoharan
A Comparison of Two Memory Models for High Performance Computers. CONPAR (1992)
Sathiamoorthy Manoharan, Nigel P. Topham
A general bound on schedule length for independent tasks. Parallel Comput. 16 (1) (1990)
Nigel P. Topham, Amos Omondi, Roland N. Ibbett
On the design and performance of conventional pipelined architectures. J. Supercomput. 1 (4) (1988)
Nigel P. Topham, Amos Omondi, Roland N. Ibbett
Context flow: An alternative to conventional pipelined architectures. J. Supercomput. 2 (1) (1988)
Roland N. Ibbett, P. C. Capon, Nigel P. Topham
MU6V: A Parallel Vector Processing System. ISCA (1985)