Michiel S. J. Steyaert

Publication Activity (10 Years)

Years Active: 1996-2022
Publications (10 Years): 10

Top Topics

Dc Dc Converter

Power Consumption

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Athanasios T. Ramkaj, Marcel J. M. Pelgrom, Michiel S. J. Steyaert, Filip Tavernier
A 28 nm CMOS Triple-Latch Feed-Forward Dynamic Comparator With <27 ps / 1 V and <70 ps / 0.6 V Delay at 5 mV-Sensitivity. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (11) (2022)
Athanasios T. Ramkaj, Juan Carlos Pena Ramos, Marcel J. M. Pelgrom, Michiel S. J. Steyaert, Marian Verhelst, Filip Tavernier
A 5-GS/s 158.6-mW 9.4-ENOB Passive-Sampling Time-Interleaved Three-Stage Pipelined-SAR ADC With Analog-Digital Corrections in 28-nm CMOS. IEEE J. Solid State Circuits 55 (6) (2020)
Elly De Pelecijn, Michiel S. J. Steyaert
Stacking Isolated SC Cores for High-Voltage Wide Input Range Monolithic DC-DC Conversion. IEEE J. Solid State Circuits 55 (10) (2020)
Elly De Pelecijn, Michiel S. J. Steyaert
Mains Interface. IEEE J. Solid State Circuits 54 (7) (2019)
Athanasios T. Ramkaj, Michiel S. J. Steyaert, Filip Tavernier
A 13.5-Gb/s 5-mV-Sensitivity 26.8-ps-CLK-OUT Delay Triple-Latch Feedforward Dynamic Comparator in 28-nm CMOS. ESSCIRC (2019)
Athanasios Ramkaj, Maarten Strackx, Michiel S. J. Steyaert, Filip Tavernier
A 1.25-GS/s 7-b SAR ADC With 36.4-dB SNDR at 5 GHz Using Switch-Bootstrapping, USPC DAC and Triple-Tail Comparator in 28-nm CMOS. IEEE J. Solid State Circuits 53 (7) (2018)
Filipe D. Baumgratz, Sandro Binsfeld Ferreira, Michiel S. J. Steyaert, Sergio Bampi, Filip Tavernier
40-nm CMOS Wideband High-IF Receiver Using a Modified Charge-Sharing Bandpass Filter to Boost Q-Factor. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2018)
Nicolas Butzen, Michiel S. J. Steyaert
MIMO Switched-Capacitor DC-DC Converters Using Only Parasitic Capacitances Through Scalable Parasitic Charge Redistribution. IEEE J. Solid State Circuits 52 (7) (2017)
Nicolas Butzen, Michiel S. J. Steyaert
Scalable Parasitic Charge Redistribution: Design of High-Efficiency Fully Integrated Switched-Capacitor DC-DC Converters. IEEE J. Solid State Circuits 51 (12) (2016)
Hans Meyvaert, Gerard Villar Pique, Ravi Karadi, Henk Jan Bergveld, Michiel S. J. Steyaert
A Light-Load-Efficient 11/1 Switched-Capacitor DC-DC Converter With 94.7% Efficiency While Delivering 100 mW at 3.3 V. IEEE J. Solid State Circuits 50 (12) (2015)
Libin Yao, Michiel S. J. Steyaert, Willy Sansen
Erratum to "A 1-V 140-μW 88-dB Audio Sigma-Delta Modulator in 90-nm CMOS". IEEE J. Solid State Circuits 44 (11) (2009)
Valentijn De Smedt, Pieter De Wit, Wim Vereecken, Michiel S. J. Steyaert
A 66 µW 86 ppm° C Fully-Integrated 6 MHz Wienbridge Oscillator With a 172 dB Phase Noise FOM. IEEE J. Solid State Circuits 44 (7) (2009)
Lianming Li, Patrick Reynaert, Michiel S. J. Steyaert
Design and Analysis of a 90 nm mm-Wave Oscillator Using Inductive-Division LC Tank. IEEE J. Solid State Circuits 44 (7) (2009)
Xu Wu, Pieter Palmers, Michiel S. J. Steyaert
A 130 nm CMOS 6-bit Full Nyquist 3 GS/s DAC. IEEE J. Solid State Circuits 43 (11) (2008)
Willem Laflere, Michiel S. J. Steyaert, Jan Craninckx
A Polar Modulator Using Self-Oscillating Amplifiers and an Injection-Locked Upconversion Mixer. IEEE J. Solid State Circuits 43 (2) (2008)
Patrick Reynaert, Michiel S. J. Steyaert
A 2.45-GHz 0.13-µm CMOS PA With Parallel Amplification. IEEE J. Solid State Circuits 42 (3) (2007)
Carolien Hermans, Michiel S. J. Steyaert
A high-speed 850-nm optical receiver front-end in 0.18-μm CMOS. IEEE J. Solid State Circuits 41 (7) (2006)
Jurgen Deveugele, Michiel S. J. Steyaert
A 10-bit 250-MS/s binary-weighted current-steering DAC. IEEE J. Solid State Circuits 41 (2) (2006)
Patrick Reynaert, Michiel S. J. Steyaert
A 1.75-GHz polar modulated CMOS RF power amplifier for GSM-EDGE. IEEE J. Solid State Circuits 40 (12) (2005)
Libin Yao, Michiel S. J. Steyaert, Willy Sansen
A 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS. IEEE J. Solid State Circuits 39 (11) (2004)
Jurgen Deveugele, Pieter Palmers, Michiel S. J. Steyaert
Parallel-path digital-to-analog converters for Nyquist signal generation. IEEE J. Solid State Circuits 39 (7) (2004)
Koen Uyttenhove, Jan Vandenbussche, Erik Lauwers, Georges G. E. Gielen, Michiel S. J. Steyaert
Design techniques and implementation of an 8-bit 200-MS/s interpolating/averaging CMOS A/D converter. IEEE J. Solid State Circuits 38 (3) (2003)
Koen Uyttenhove, Michiel S. J. Steyaert
A 1.8-V 6-bit 1.3-GHz flash ADC in 0.25-μm CMOS. IEEE J. Solid State Circuits 38 (7) (2003)
Bram De Muer, Michiel S. J. Steyaert
On the analysis of ΔΣ fractional-N frequency synthesizers for high-spectral purity. IEEE Trans. Circuits Syst. II Express Briefs 50 (11) (2003)
Koen L. R. Mertens, Michiel S. J. Steyaert
A 700-MHz 1-W fully differential CMOS class-E power amplifier. IEEE J. Solid State Circuits 37 (2) (2002)
Peter J. Vancorenland, Michiel S. J. Steyaert
A 1.57-GHz fully integrated very low-phase-noise quadrature VCO. IEEE J. Solid State Circuits 37 (5) (2002)
Augusto Manuel Marques, Michiel S. J. Steyaert, Willy M. C. Sansen
Theory of PLL fractional-N frequency synthesizers. Wirel. Networks 4 (1) (1998)
Marc A. F. Borremans, Michiel S. J. Steyaert
A 2-V, low distortion, 1-GHz CMOS up-conversion mixer. IEEE J. Solid State Circuits 33 (3) (1998)
Wim Dehaene, Michiel S. J. Steyaert, Willy Sansen
A 50-MHz standard CMOS pulse equalizer for hard disk read channels. IEEE J. Solid State Circuits 32 (7) (1997)
Mark Ingels, Michiel S. J. Steyaert
Design strategies and decoupling techniques for reducing the effects of electrical interference in mixed-mode IC's. IEEE J. Solid State Circuits 32 (7) (1997)
Vincenzo Peluso, Michiel S. J. Steyaert, Willy Sansen
A 1.5-V-100-μW ΔΣ modulator with 12-b dynamic range using the switched-opamp technique. IEEE J. Solid State Circuits 32 (7) (1997)
Jan Craninckx, Michiel S. J. Steyaert
A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors. IEEE J. Solid State Circuits 32 (5) (1997)
Peter R. Kinget, Michiel S. J. Steyaert
A 1-GHz CMOS up-conversion mixer. IEEE J. Solid State Circuits 32 (3) (1997)
Jan Craninckx, Michiel S. J. Steyaert
A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-μm CMOS. IEEE J. Solid State Circuits 31 (7) (1996)
Raf Roovers, Michiel S. J. Steyaert
A 175 Ms/s, 6 b, 160 mW, 3.3 V CMOS A/D converter. IEEE J. Solid State Circuits 31 (7) (1996)