Valentijn De Smedt

Publication Activity (10 Years)

Years Active: 2008-2024
Publications (10 Years): 9

Top Topics

Matlab Simulink

Power Electronics

Top Venues

Publications

Arindam Mishra, Wei Zhu, Bernhard Wicht, Valentijn De Smedt
A Dual-Inductor Ladder Buck Converter for Li-Ion Battery-Operated Sub-Volt SoCs. IEEE J. Solid State Circuits 59 (2) (2024)
Wei Zhu, Arindam Mishra, Valentijn De Smedt
An On-chip Voltage Mode Control Circuit with Operation Mode Switch for Phase-shifted Full-bridge Isolated DC-DC Bus Converters. NEWCAS (2022)
Wei Zhu, Arindam Mishra, Arijit Karmakar, Valentijn De Smedt
A 400V Gate Driver with Complementary Slope Sensing ZVS Detector and High Voltage Level Shifter for Full-Bridge Phase-Shifted Converters. NEWCAS (2022)
Arijit Karmakar, Valentijn De Smedt, Paul Leroux
Pseudo-Differential Time-Domain Integrator Using Charge-Based Time-Domain Circuits. LASCAS (2021)
Arijit Karmakar, Valentijn De Smedt, Paul Leroux
A 0.18 pJ/Step Time-Domain 1st Order ΔΣ Capacitance-to-Digital Converter in 65-nm CMOS. ISCAS (2021)
Arindam Mishra, Valentijn De Smedt
A Novel Hybrid Buck-Boost Converter Topology for Li-ion Batteries with Increased Efficiency. ICECS (2020)
Jeffrey Prinzie, Szymon Kulis, Pedro Leitao, Rui Francisco, Valentijn De Smedt, Paulo Moreira, Paul Leroux
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS. LASCAS (2019)
Valentijn De Smedt, Jef Thone, Mike Wens
A 650 V, 3 A three-phase fully-integrated BLDC motor driver with charge pump and level shifters. ESSCIRC (2016)
Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene
Development of an Ultralow-Power Injection-Locked PSK Receiver Architecture. IEEE Trans. Circuits Syst. II Express Briefs (1) (2015)
Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene
Transient Behavior and Phase Noise Performance of Pulsed-Harmonic Oscillators. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2014)
Florian De Roose, Valentijn De Smedt, Wouter Volkaerts, Michiel Steyaert, Georges G. E. Gielen, Patrick Reynaert, Wim Dehaene
Design of a frequency reference based on a PVT-independent transmission line delay. ISCAS (2014)
Jelle Van Rethy, Hans Danneels, Valentijn De Smedt, Wim Dehaene, Georges G. E. Gielen
Supply-Noise-Resilient Design of a BBPLL-Based Force-Balanced Wheatstone Bridge Interface in 130-nm CMOS. IEEE J. Solid State Circuits 48 (11) (2013)
Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene
A 40nm-CMOS, 72 µW injection-locked timing reference and 1.8 Mbit/s coordination receiver for wireless sensor networks. ESSCIRC (2013)
Jelle Van Rethy, Hans Danneels, Valentijn De Smedt, Wim Dehaene, Georges G. E. Gielen
A low-power and low-voltage BBPLL-based sensor interface in 130nm CMOS for wireless sensor networks. DATE (2013)
Jan Verveckken, Frederik Geth, Borbála Hunyadi, Jef Beerten, Niels Leemput, Juan Van Roy, Pieter Tielens, Valentijn De Smedt, Sandro Iacovella, Ninah Koolen, Hans De Clercq, Johan Driesen, Georges G. E. Gielen, Robert Puers, Joos Vandewalle, Sabine Van Huffel, Ronnie Belmans, Geert Deconinck, Wim Dehaene
Developing engineering-oriented educational workshops within a student branch. EUROCON (2013)
Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene
A 127 μW exact timing reference for Wireless Sensor Networks based on injection locking. ESSCIRC (2012)
Valentijn De Smedt, Georges G. E. Gielen, Wim Dehaene
A 0.6V to 1.6V, 46μW voltage and temperature independent 48 MHz pulsed LC oscillator for RFID tags. A-SSCC (2011)
Wouter Volkaerts, Bart Marien, Hans Danneels, Valentijn De Smedt, Patrick Reynaert, Wim Dehaene, Georges G. E. Gielen
A 0.5 V-1.4 V supply-independent frequency-based analog-to-digital converter with fast start-up time for wireless sensor networks. ISCAS (2010)
Valentijn De Smedt, Wim Dehaene, Georges G. E. Gielen
A 0.4-1.4V 24MHz fully integrated 33µW, 104ppm/V supply-independent oscillator for RFIDs. ESSCIRC (2009)
Valentijn De Smedt, Pieter De Wit, Wim Vereecken, Michiel S. J. Steyaert
A 66 µW 86 ppm° C Fully-Integrated 6 MHz Wienbridge Oscillator With a 172 dB Phase Noise FOM. IEEE J. Solid State Circuits 44 (7) (2009)
Valentijn De Smedt, Pieter De Wit, Wim Vereecken, Michiel Steyaert
Erratum to "A 66 µW 86 ppm°C Fully-Integrated 6 MHz Wienbridge Oscillator With a 172 dB Phase Noise FOM" [Jul 09 1990-2001]. IEEE J. Solid State Circuits 44 (10) (2009)
Valentijn De Smedt, Pieter De Wit, Wim Vereecken, Michiel Steyaert
A fully-integrated Wienbridge topology for ultra-low-power 86ppm/°C 65nm CMOS 6MHz clock reference with amplitude regulation. ESSCIRC (2008)