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Jeffrey Prinzie
ORCID
Publication Activity (10 Years)
Years Active: 2015-2024
Publications (10 Years): 8
Top Topics
Intel Xeon
Transaction Processing Systems
Hurst Exponent
High Speed
Top Venues
A-SSCC
IEEE Trans. Circuits Syst. I Regul. Pap.
CoRR
IEEE Trans. Circuits Syst. I Fundam. Theory Appl.
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Publications
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Naïn Jonckers
,
Toon Vinck
,
Gert Dekkers
,
Peter Karsmakers
,
Jeffrey Prinzie
Single-Event Upset Analysis of a Systolic Array based Deep Neural Network Accelerator.
CoRR
(2024)
Neeraj Mishra
,
Anchit Proch
,
Lomash Chandra Acharya
,
Jeffrey Prinzie
,
Sudipto Chakraborty
,
Rajiv V. Joshi
,
Sudeb Dasgupta
,
Anand Bulusu
Phase Noise Analysis of Separately Driven Ring Oscillators.
IEEE Trans. Circuits Syst. I Regul. Pap.
69 (11) (2022)
Bjorn Van Bockel
,
Paul Leroux
,
Jeffrey Prinzie
Tradeoffs in Time-to-Digital Converter Architectures for Harsh Radiation Environments.
IEEE Trans. Instrum. Meas.
70 (2021)
Stefan Biereigel
,
Szymon Kulis
,
Pedro Leitao
,
Rui Francisco
,
Paulo Moreira
,
Paul Leroux
,
Jeffrey Prinzie
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit With High Speed Feed Forward Correction in 65 nm CMOS.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl.
(5) (2020)
Jeffrey Prinzie
,
Shuja Andrabi
,
Christophe Beghein
,
Changhua Cao
,
Xiaochuan Guo
,
Jon Strange
,
Bernard Tenbroek
A Fast Locking 5.8 - 7.2 GHz Fractional-N Synthesizer with Sub-2 us Settling Time in 22 nm FDSOI.
VLSI Circuits
(2020)
Jeffrey Prinzie
,
Szymon Kulis
,
Pedro Leitao
,
Rui Francisco
,
Valentijn De Smedt
,
Paulo Moreira
,
Paul Leroux
A Low Noise Fault Tolerant Radiation Hardened 2.56 Gbps Clock-Data Recovery Circuit with High Speed Feed Forward Correction in 65 nm CMOS.
LASCAS
(2019)
Jeffrey Prinzie
,
Michiel Steyaert
,
Paul Leroux
A Self-Calibrated Bang-Bang Phase Detector for Low-Offset Time Signal Processing.
IEEE Trans. Circuits Syst. II Express Briefs
(5) (2016)
Jeffrey Prinzie
,
Michiel Steyaert
,
Paul Leroux
,
Jorgen Christiansen
,
Paulo Moreira
A single-event upset robust, 2.2 GHz to 3.2 GHz, 345 fs jitter PLL with triple-modular redundant phase detector in 65 nm CMOS.
A-SSCC
(2016)
Bram Faes
,
Jeffrey Prinzie
,
Maarten Strackx
,
Patrick Reynaert
,
Paul Leroux
Experimental validation of a compact model for EM reflection and transmission in multi-layered structures.
I2MTC
(2015)