Bernhard Wicht

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 34

Top Topics

Power Management

Fully Integrated

Top Venues

IEEE J. Solid State Circuits

Publications

Niklas Deneke, Bernhard Wicht
31.10 A Fully integrated 500V, 6.25MHz GaN-IC for Totem-Pole PFC Off-Line Power Conversion. ISSCC (2024)
Jesko Flemming, Bernhard Wicht, Pascal Witte
A DAC Sharing and Linearization Technique for Time-Interleaved Incremental Delta-Sigma ADCs. ISCAS (2024)
Arindam Mishra, Wei Zhu, Bernhard Wicht, Valentijn De Smedt
A Dual-Inductor Ladder Buck Converter for Li-Ion Battery-Operated Sub-Volt SoCs. IEEE J. Solid State Circuits 59 (2) (2024)
Jesko Flemming, Bernhard Wicht, Pascal Witte
A Noise-Canceling SMASH Architecture for Discrete-Time Bandpass Delta-Sigma ADCs. ISCAS (2023)
Adrian Gehl, Kyrylo Cherniak, Olga Kharko, Gianluca Marin, Petru Bacinski, Frank Prämaßing, Bernhard Wicht
A 2-8V Vin 670mA Scalable Multi-Ratio SC DCDC Converter for MCU Integration in 28nm CMOS Achieving 91% Peak Efficiency. ESSCIRC (2023)
Jesko Flemming, Bernhard Wicht, Pascal Witte
Stability Analysis for Frequency Tunable Bandpass Delta-Sigma ADC Architectures. SMACD (2023)
Christoph Rindfleisch, Bernhard Wicht
A 110/230 V AC and 15-400 V DC 0.3 W Power-Supply IC With Integrated Active Zero-Crossing Buffer. IEEE J. Solid State Circuits 57 (12) (2022)
Christoph Rindfleisch, Jens Otten, Bernhard Wicht
A Highly-Integrated 20-300V 0.5W Active-Clamp Flyback DCDC Converter with 76.7% Peak Efficiency. CICC (2022)
Christoph Rindfleisch, Bernhard Wicht
A 110V/230V 0.3W Offline Chip-Scale Power Supply with Integrated Active Zero-Crossing Buffer and Voltage-Interval-Based Dual-Mode Control. ISSCC (2022)
Min Chen, Bernhard Wicht, Kousuke Miyaji
Session 33 Overview: High-Voltage, GaN and Wireless Power Power Management Subcommittee. ISSCC (2021)
Christoph Rindfleisch, Bernhard Wicht
A Resonant One-Step 325 V to 3.3-10 V DC-DC Converter With Integrated Power Stage Benefiting From High-Voltage Loss-Reduction Techniques. IEEE J. Solid State Circuits 56 (11) (2021)
Maik Kaufmann, Bernhard Wicht
A Monolithic GaN-IC With Integrated Control Loop for 400-V Offline Buck Operation Achieving 95.6% Peak Efficiency. IEEE J. Solid State Circuits 55 (12) (2020)
Maik Kaufmann, Michael Lueders, Cetin Kaya, Bernhard Wicht
18.2 A Monolithic E-Mode GaN 15W 400V Offline Self-Supplied Hysteretic Buck Converter with 95.6% Efficiency. ISSCC (2020)
Christoph Rindfleisch, Bernhard Wicht
11.3 A One-Step 325V to 3.3-to-10V 0.5W Resonant DC-DC Converter with Fully Integrated Power Stage and 80.7% Efficiency. ISSCC (2020)
Maik Kaufmann, Achim Seidel, Bernhard Wicht
Long, Short, Monolithic - The Gate Loop Challenge for GaN Drivers: Invited Paper. CICC (2020)
Peter Renz, Maik Kaufmann, Michael Lueders, Bernhard Wicht
A Fully Integrated 85%-Peak-Efficiency Hybrid Multi Ratio Resonant DC-DC Converter with 3.0-to-4.5V Input and 500μA -to-120mA Load Range. ISSCC (2019)
Youngcheol Chae, Bernhard Wicht, Bob Verbruggen, Payam Heydari, Howard C. Luong
Introduction to the Special Issue on the 2019 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 54 (12) (2019)
Sebastian Kiesel, Thomas Kern, Bernhard Wicht, Helmut Graeb
A 30 ns 16 Mb 2 b/cell Embedded Flash with Ramped Gate Time-Domain Sensing Scheme for Automotive Application. VLSI-DAT (2019)
Achim Seidel, Bernhard Wicht
A fully integrated three-level 11.6nC gate driver supporting GaN gate injection transistors. ISSCC (2018)
Daniel Lutz, Achim Seidel, Bernhard Wicht
A 50V, 1.45ns, 4.1pJ High-Speed Low-Power Level Shifter for High-Voltage DCDC Converters. ESSCIRC (2018)
Tobias Funk, Bernhard Wicht
A fully integrated DC to 75 MHz current sensing circuit with on-chip Rogowski coil. CICC (2018)
Samuel Quenzer-Hohmuth, Steffen Ritzmann, Thoralf Rosahl, Bernhard Wicht
A Boost Converter with 3-6V Input and Fast Transient Digital Control Comprising a 90 ns-Latency Live-Tracking Window ADC. ESSCIRC (2018)
Achim Seidel, Bernhard Wicht
Integrated Gate Drivers Based on High-Voltage Energy Storing for GaN Transistors. IEEE J. Solid State Circuits 53 (12) (2018)
Axel Thomsen, Bernhard Wicht, Pieter Harpe, Man Kay Law, Young Cheol Chae
F6: Advances in energy efficient analog design. ISSCC (2018)
Juergen Wittmann, Tobias Funk, Thoralf Rosahl, Bernhard Wicht
9-25-MHz Resonant DC-DC Converter. IEEE J. Solid State Circuits 53 (7) (2018)
Francesco Santoro, Rüdiger Kuhn, Neil Gibson, Nicola Rasera, Thomas Tost, Helmut Graeb, Bernhard Wicht, Ralf Brederlow
A Hysteretic Buck Converter With 92.1% Maximum Efficiency Designed for Ultra-Low Power and Fast Wake-Up SoC Applications. IEEE J. Solid State Circuits 53 (6) (2018)
Achim Seidel, Bernhard Wicht
25.3 A 1.3A gate driver for GaN with fully integrated gate charge buffer capacitor delivering 11nC enabled by high-voltage energy storing. ISSCC (2017)
Sebastian Kiesel, Thomas Kern, Bernhard Wicht
Time-domain ramped gate sensing for embedded multi-level flash in automotive applications. MWSCAS (2017)
Juergen Wittmann, Tobias Funk, Thoralf Rosahl, Bernhard Wicht
A 12-48 V wide-vin 9-15 MHz soft-switching controlled resonant DCDC converter. ESSCIRC (2017)
Peter Renz, Philipp Lamprecht, Daniel Teufel, Bernhard Wicht
A 40V current sensing circuit with fast on/off transition for high-voltage power management. MWSCAS (2016)
Alexis Schindler, Benno Koeppl, Ansgar Pottbaecker, Markus Zannoth, Bernhard Wicht
Gate driver with 10 / 15ns in-transition variable drive current and 60% reduced current dip. ESSCIRC (2016)
Daniel Lutz, Peter Renz, Bernhard Wicht
A 120/230 Vrms-to-3.3V micro power supply with a fully integrated 17V SC DCDC converter. ESSCIRC (2016)
Daniel Lutz, Peter Renz, Bernhard Wicht
12.4 A 10mW fully integrated 2-to-13V-input buck-boost SC converter with 81.5% peak efficiency. ISSCC (2016)
Juergen Wittmann, Alexander Barner, Thoralf Rosahl, Bernhard Wicht
An 18 V Input 10 MHz Buck Converter With 125 ps Mixed-Signal Dead Time Control. IEEE J. Solid State Circuits 51 (7) (2016)
Achim Seidel, Marco Salvatore Costa, Joachim Joos, Bernhard Wicht
Area Efficient Integrated Gate Drivers Based on High-Voltage Charge Storing. IEEE J. Solid State Circuits 50 (7) (2015)
Tobias Funk, Juergen Wittmann, Thoralf Rosahl, Bernhard Wicht
A 20 V, 8 MHz resonant DCDC converter with predictive control for 1 ns resolution soft-switching. ISCAS (2015)
Alexis Schindler, Benno Koeppl, Bernhard Wicht
EMC and switching loss improvement for fast switching power stages by di/dt, dv/dt optimization with 10ns variable current source gate driver. EMC Compo (2015)
Juergen Wittmann, Alexander Barner, Thoralf Rosahl, Bernhard Wicht
A 12V 10MHz buck converter with dead time control based on a 125 ps differential delay chain. ESSCIRC (2015)
Achim Seidel, Marco Salvatore Costa, Joachim Joos, Bernhard Wicht
Bootstrap circuit with high-voltage charge storing for area efficient gate drivers in power management systems. ESSCIRC (2014)
Juergen Wittmann, Thoralf Rosahl, Bernhard Wicht
A 50V high-speed level shifter with high dv/dt immunity for multi-MHz DCDC converters. ESSCIRC (2014)
Moris Lin, Yung-Sheng Huang, Andreas Ehrhart, Yu-Huei Lee, Chao-Chang Chiu, Bernhard Wicht, Ke-Horng Chen
Authentic mode-toggled detector with fast transient response under wide load range buck-boost converter. ISCAS (2013)
Alexis Schindler, Benno Koeppl, Bernhard Wicht
EMC analysis of current source gate drivers. EMC Compo (2013)
Juergen Wittmann, Bernhard Wicht
EMC influence of the charge pump in linear regulators - Design, simulation and measurements. ISCAS (2011)
Stefan Herzer, Sumeet Kulkarni, Maciej Jankowski, Jochen Neidhardt, Bernhard Wicht
Capacitive-coupled current sensing and Auto-ranging slope compensation for current mode SMPS with wide supply and frequency range. ESSCIRC (2009)
Michael Wendt, Lenz Thoma, Bernhard Wicht, Doris Schmitt-Landsiedel
A Configurable High-Side/Low-Side Driver With Fast and Equalized Switching Delay. IEEE J. Solid State Circuits 43 (7) (2008)
Michael Wendt, Lenz Thoma, Bernhard Wicht, Doris Schmitt-Landsiedel
A configurable High-Side/ low-Side Driver. ESSCIRC (2007)
Bernhard Wicht, Thomas Nirschl, Doris Schmitt-Landsiedel
Yield and speed optimization of a latch-type voltage sense amplifier. IEEE J. Solid State Circuits 39 (7) (2004)
Bernhard Wicht, Thomas Nirschl, Doris Schmitt-Landsiedel
A yield-optimized latch-type SRAM sense amplifier. ESSCIRC (2003)
Bernhard Wicht, Steffen Paul, Doris Schmitt-Landsiedel
Analysis and compensation of the bitline multiplexer in SRAM current sense amplifiers. IEEE J. Solid State Circuits 36 (11) (2001)