A 0.18 pJ/Step Time-Domain 1st Order ΔΣ Capacitance-to-Digital Converter in 65-nm CMOS.

Arijit Karmakar Valentijn De Smedt Paul Leroux

Published in: ISCAS (2021)

Keyphrases

high speed
low cost
feature extraction
wavelet transform
mathematical model
low power
transfer function
delay insensitive