Meng-Hsueh Chiang

Publication Activity (10 Years)

Years Active: 2010-2024
Publications (10 Years): 10

Top Topics

Thin Film Transistor

Random Access Memory

Top Venues

Microelectron. Reliab.

Publications

Zih-Fei Chen, Ya-Chi Huang, Yu-Shen Lai, Yi-Ting Wu, Cheng-Ming Huang, Meng-Hsueh Chiang
Fabrication of Hybrid Fin/Planar LDMOS with Modulation Gate. DRC (2024)
Po-Chih Chen, Yi-Ting Wu, Meng-Hsueh Chiang
Performance Comparison of SRAM Designs Implemented with Silicon-On-Insulator Nanosheet Transistors and Bulk FinFETs. ESSDERC (2023)
Ming-Yu Chang, Po-Yu Chao, Meng-Hsueh Chiang
Back-Bias Modulated UTBB SOI for System-on-Chip I/O Cells. ISQED (2021)
Darsen D. Lu, Mohan V. Dunga, Ali M. Niknejad, Chenming Hu, Fu-Xiang Liang, Wei-Chen Hung, Jia-Wei Lee, Chun-Hsiang Hsu, Meng-Hsueh Chiang
Compact Device Models for FinFET and Beyond. CoRR (2020)
Ya-Chi Huang, Meng-Hsueh Chiang, Shui-Jinn Wang
Speed Optimization of Vertically Stacked Gate-All-Around MOSFETs with Inner Spacers for Low Power and Ultra-Low Power Applications. ISQED (2019)
Ya-Chi Huang, Meng-Hsueh Chiang, Shui-Jinn Wang, Sumeet Kumar Gupta
An area efficient low-voltage 6-T SRAM cell using stacked silicon nanowires. ICICDT (2018)
Jheng-Yi Chen, Ming-Yu Chang, Shi-Hao Chen, Jia-Wei Lee, Meng-Hsueh Chiang
Body-biasing assisted vmin optimization for 5nm-node multi-Vt FD-SOI 6T-SRAM. ISQED (2018)
Chun-Yu Chen, Jyi-Tsong Lin, Meng-Hsueh Chiang
Threshold-voltage variability analysis and modeling for junctionless double-gate transistors. Microelectron. Reliab. 74 (2017)
Meng-Yen Wu, Meng-Hsueh Chiang
Performance evaluation of stacked gate-all-around MOSFETs at 7 and 10 nm technology nodes. ISQED (2016)
Ya-Chi Huang, Meng-Hsueh Chiang, Wei-Chou Hsu, Shiou-Ying Cheng
6-T SRAM performance assessment with stacked silicon nanowire MOSFETs. ISQED (2015)
Yi-Bo Liao, Meng-Hsueh Chiang, Keunwoo Kim, Wei-Chou Hsu
Assessment of structure variation in silicon nanowire FETs and impact on SRAM. Microelectron. J. 43 (5) (2012)
Hsun Li, Meng-Hsueh Chiang
Design issues and insights of multi-fin bulk silicon FinFETs. ISQED (2012)
Meng-Hsueh Chiang, Yi-Bo Liao, Jun-Tin Lin, Wei-Chou Hsu, Chu Yu, Pei-Chia Chiang, Y.-Y. Hsu, W.-H. Liu, Shyh-Shyuan Sheu, Keng-Li Su, Ming-Jer Kao, Ming-Jinn Tsai
Low power design of phase-change memory based on a comprehensive model. IET Comput. Digit. Tech. 4 (4) (2010)