6-T SRAM performance assessment with stacked silicon nanowire MOSFETs.

Ya-Chi Huang Meng-Hsueh Chiang Wei-Chou Hsu Shiou-Ying Cheng

Published in: ISQED (2015)

Keyphrases

low voltage
leakage current
cmos technology
random access memory
low power
power consumption
design considerations
power line
high speed
low cost
high density
power management
social networks
silicon dioxide
image sequences
real time
gallium arsenide