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Speed Optimization of Vertically Stacked Gate-All-Around MOSFETs with Inner Spacers for Low Power and Ultra-Low Power Applications.
Ya-Chi Huang
Meng-Hsueh Chiang
Shui-Jinn Wang
Published in:
ISQED (2019)
Keyphrases
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low power
ultra low power
high speed
cmos technology
power consumption
low voltage
low cost
nm technology
high power
digital signal processing
power dissipation
single chip
wireless transmission
real time
logic circuits
low power consumption
vlsi circuits
spatially varying
signal processor
general purpose