Kurt Antreich

Publication Activity (10 Years)

Years Active: 1987-2007
Publications (10 Years): 0

Publications

Guido Stehr, Helmut E. Graeb, Kurt Antreich
Analog Performance Space Exploration by Normal-Boundary Intersection and by Fourier-Motzkin Elimination. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (10) (2007)
Guido Stehr, Helmut E. Graeb, Kurt Antreich
Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing. ICCAD (2004)
Guido Stehr, Helmut E. Graeb, Kurt Antreich
Performance trade-off analysis of analog circuits by normal-boundary intersection. DAC (2003)
Guido Stehr, Michael Pronath, Frank Schenkel, Helmut E. Graeb, Kurt Antreich
Initial Sizing of Analog Integrated Circuits by Centering Within Topology-Given Implicit Specification. ICCAD (2003)
Michael Pronath, Helmut E. Graeb, Kurt Antreich
A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits. DATE (2002)
Alfred Kölbl, James H. Kukula, Kurt Antreich, Robert F. Damiano
Handling special constructs in symbolic simulation. DAC (2002)
Frank Schenkel, Michael Pronath, Stephan Zizala, Robert Schwencker, Helmut E. Graeb, Kurt Antreich
Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search. DAC (2001)
Frank Schenkel, Michael Pronath, Helmut Graeb, Kurt Antreich
A fast method for identifying matching-relevant transistor pairs. CICC (2001)
Helmut E. Graeb, Stephan Zizala, Josef Eckmüller, Kurt Antreich
The Sizing Rules Method for Analog Integrated Circuit Design. ICCAD (2001)
Paul Tafertshofer, Andreas Ganz, Kurt Antreich
IGRAINE-an Implication GRaph-bAsed engINE for fast implication, justification, and propagation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (8) (2000)
Kurt Antreich, Josef Eckmüller, Helmut Graeb, Michael Pronath, Frank Schenkel, Robert Schwencker, Stephan Zizala
WiCkeD: analog circuit synthesis incorporating mismatch. CICC (2000)
Robert Schwencker, Frank Schenkel, Helmut E. Graeb, Kurt Antreich
The Generalized Boundary Curve-A Common Method for Automatic Nominal Design and Design Centering of Analog Circuits. DATE (2000)
Michael Pronath, Volker Glöckel, Helmut Gräb, Kurt Antreich
Simulationsbasierter Testentwurf für gemischt analog-digitale Systeme. Informationstechnik Tech. Inform. 41 (2) (1999)
Robert Schwencker, Josef Eckmüller, Helmut E. Graeb, Kurt Antreich
Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints. DATE (1999)
Bernd Wurth, Ulf Schlichtmann, Klaus Eckl, Kurt Antreich
Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs. ACM Trans. Design Autom. Electr. Syst. 4 (3) (1999)
Walter M. Lindermeir, Helmut E. Graeb, Kurt Antreich
Analog testing by characteristic observation inference. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (9) (1999)
Kurt Antreich, Franz J. Rammig, Wolfgang Rosenstiel, Detlef Schmid, Klaus Waldschmidt
DFG-Schwerpunktprogramm: Entwurf und Entwurfsmethodik eingebetteter Systeme. GI Jahrestagung (1997)
Kurt Antreich, Franz J. Rammig, Wolfgang Rosenstiel, Detlef Schmid, Klaus Waldschmidt
DFG-Schwerpunktprogramm: Entwurf und Entwurfsmethodik eingebetteter Systeme. Inform. Forsch. Entwickl. 12 (4) (1997)
Peter A. Krauss, Andreas Ganz, Kurt Antreich
Distributed Test Pattern Generation for Stuck-At Faults in Sequential Circuits. J. Electron. Test. 11 (3) (1997)
Manfred Henftling, Hannes C. Wittmann, Kurt Antreich
A single-path-oriented fault-effect propagation in digital circuits considering multiple-path sensitization. ICCAD (1995)
Bernd Wurth, Klaus Eckl, Kurt Antreich
Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm. DAC (1995)
Bernhard Rohfleisch, Bernd Wurth, Kurt Antreich
Logic Clause Analysis for Delay Optimization. DAC (1995)
Walter M. Lindermeir, Helmut E. Graeb, Kurt Antreich
Design based analog testing by Characteristic Observation Inference. ICCAD (1995)
Manfred Henftling, Hannes C. Wittmann, Kurt Antreich
A formal non-heuristic ATPG approach. EURO-DAC (1995)
Kurt Antreich, Helmut E. Graeb, Claudia U. Wieser
Circuit analysis and optimization driven by worst-case distances. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (1) (1994)
Henning Spruth, Frank M. Johannes, Kurt Antreich
PHIroute: A Parallel Hierarchical Sea-of-Gates Router. ISCAS (1994)
Manfred Henftling, Hannes C. Wittmann, Kurt Antreich
Path Hashing to Accelerate Delay Fault Simulation. DAC (1994)
Konrad Doll, Frank M. Johannes, Kurt Antreich
Iterative placement improvement by network flow methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (10) (1994)
Peter H. Schneider, Kurt Antreich, Ulf Schlichtmann
A new power estimation technique with application to decomposition of Boolean functions for low power. EURO-DAC (1994)
Peter A. Krauss, Kurt Antreich
Application of Fault Parallelism to the Automatic Test Pattern Generation for Sequential Circuits. Parallel Computer Architectures (1993)
Helmut E. Graeb, Claudia U. Wieser, Kurt Antreich
Improved Methods for Worst-Case Analysis and Optimization Incorporating Operating Tolerances. DAC (1993)
Helmut E. Graeb, Claudia U. Wieser, Kurt Antreich
Design verification considering manufacturing tolerances by using worst-caste distances. EURO-DAC (1992)
Kurt Antreich, Helmut E. Graeb
Circuit Optimization Driven by Worst-Case Distances. ICCAD (1991)
Jürgen M. Kleinhans, Georg Sigl, Frank M. Johannes, Kurt Antreich
GORDIAN: VLSI placement by quadratic programming and slicing optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (3) (1991)
Thomas H. Krodel, Kurt Antreich
An accurate model for ambiguity delay simulation. EURO-DAC (1990)
Kurt Antreich, Michael H. Schulz
Accelerated Fault Simulation and Fault Grading in Combinational Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6 (5) (1987)