Koh Johguchi

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 5

Top Topics

Design Requirements

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEICE Trans. Electron.

Publications

Kaede Kano, Koh Johguchi
Photodiode and Analog-Front-End Circuit Design for Wearable Vital Sensing System with Fiber-Bragg-Grating Sensor. ISDCS (2023)
Yuichiro Ichimura, Kenta Goto, Koh Johguchi
Temperature Sensor Circuit for a Wearable Perspiration Monitoring System. ISDCS (2023)
T. Sakata, Y. Mitani, Kousuke Miyaji, S. Kaneko, T. Uekura, H. Taki, H. Momose, Koh Johguchi
A CMOS Integrated Sweat Monitoring System for Medical Applications. ISDCS (2019)
Hassan Arafat, Ryohei Shimizu, Koh Johguchi
Hierarchial Hybrid Solid State Drive. TENCON (2018)
Shuhei Tanakamaru, Shogo Hosaka, Koh Johguchi, Hirofumi Takishita, Ken Takeuchi
Understanding the Relation Between the Performance and Reliability of nand Flash/SCM Hybrid Solid-State Drive. IEEE Trans. Very Large Scale Integr. Syst. 24 (6) (2016)
Chao Sun, Ayumi Soga, Takahiro Onagi, Koh Johguchi, Ken Takeuchi
A workload-aware-design of 3D-NAND flash memory for enterprise SSDs. ISQED (2014)
Chao Sun, Kousuke Miyaji, Koh Johguchi, Ken Takeuchi
A High Performance and Energy-Efficient Cold Data Eviction Algorithm for 3D-TSV Hybrid ReRAM/MLC NAND SSD. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2014)
Chao Sun, Tomoko Ogura Iwasaki, Takahiro Onagi, Koh Johguchi, Ken Takeuchi
Cost, Capacity, and Performance Analyses for Hybrid SCM/NAND Flash SSD. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2014)
Koh Johguchi, Kasuaki Yoshioka, Ken Takeuchi
NAND Phase Change Memory with Block Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance. IEICE Trans. Electron. (4) (2014)
Koh Johguchi, Toru Egami, Kousuke Miyaji, Ken Takeuchi
A Temperature Tracking Read Reference Current and Write Voltage Generator for Multi-Level Phase Change Memories. IEICE Trans. Electron. (4) (2014)
Chao Sun, Hiroki Fujii, Kousuke Miyaji, Koh Johguchi, Kazuhide Higuchi, Ken Takeuchi
Over 10-times high-speed, energy efficient 3D TSV-integrated hybrid ReRAM/MLC NAND SSD by intelligent data fragmentation suppression. ASP-DAC (2013)
Hiroki Fujii, Kousuke Miyaji, Koh Johguchi, Kazuhide Higuchi, Chao Sun, Ken Takeuchi
x11 performance increase, x6.9 endurance enhancement, 93% energy reduction of 3D TSV-integrated hybrid ReRAM/MLC NAND SSDs by data fragmentation suppression. VLSIC (2012)
Norio Sadachika, Shu Mimura, Akihiro Yumisaki, Koh Johguchi, Akihiro Kaya, Mitiko Miura-Mattausch, Hans Jürgen Mattausch
Prediction of Circuit-Performance Variations from Technology Variations for Reliable 100 nm SOC Circuit Design. IEICE Trans. Electron. (3) (2011)
Teruyoshi Hatanaka, Koh Johguchi, Ken Takeuchi
A 3D-Integration method to compensate output voltage degradation of boost converter for compact Solid-State-Drives. 3DIC (2011)
Koh Johguchi, Akihiro Kaya, Shinya Izumi, Hans Jürgen Mattausch, Tetsushi Koide, Norio Sadachika
Measurement-Based Ring Oscillator Variation Analysis. IEEE Des. Test Comput. 27 (5) (2010)
Koh Johguchi, Hans Jürgen Mattausch, Tetsushi Koide, Tetsuo Hironaka
4-Port Unified Data/Instruction Cache Design with Distributed Crossbar and Interleaved Cache-Line Words. IEICE Trans. Electron. (11) (2007)
Koh Johguchi, Yuya Mukuda, Shinya Izumi, Hans Jürgen Mattausch, Tetsushi Koide
A 0.6-Tbps, 16-port SRAM design with 2-stage- pipeline and multi-stage-sensing scheme. ESSCIRC (2007)
Koh Johguchi, Yuya Mukuda, Ken-ichi Aoyama, Hans Jürgen Mattausch, Tetsushi Koide
A 2-stage-pipelined 16 port SRAM with 590Gbps random access bandwidth and large noise margin. IEICE Electron. Express 4 (2) (2007)
Koh Johguchi, Zhaomin Zhu, Hans Jürgen Mattausch, Tetsushi Koide, Tetsuo Hironaka, Kazuya Tanigawa
Unified Data/Instruction Cache with Hierarchical Multi-Port Architecture and Hidden Precharge Pipeline. APCCAS (2006)
Zhaomin Zhu, Koh Johguchi, Hans Jürgen Mattausch, Tetsushi Koide, Tai Hirakawa, Tetsuo Hironaka
A novel hierarchical multi-port cache. ESSCIRC (2003)