Keerthi Heragu

Publication Activity (10 Years)

Years Active: 1994-2008
Publications (10 Years): 0

Publications

Gordon Gammie, Alice Wang, Minh Chau, Sumanth Gururajarao, Robert Pitts, Fabien Jumel, Stacey Engel, Philippe Royannez, Rolf Lagerquist, Hugh Mair, Jeff Vaccani, Greg Baldwin, Keerthi Heragu, Rituparna Mandal, Michael Clinton, Don Arden, Uming Ko
A 45nm 3.5G Baseband-and-Multimedia Application Processor using Adaptive Body-Bias and Ultra-Low-Power Techniques. ISSCC (2008)
Robert Payne, Paul E. Landman, Bhavesh Bhakta, Sridhar Ramaswamy, Song Wu, John D. Powers, M. Ulvi Erdogan, Ah-Lyan Yee, Richard Gu, Lin Wu, Yiqun Xie, Bharadwaj Parthasarathy, Keith C. Brouse, Wahed Mohammed, Keerthi Heragu, Vikas Gupta, Lisa Dyson, Wai Lee
A 6.25-Gb/s binary transceiver in 0.13-/spl mu/m CMOS for serial data transmission across high loss legacy backplane channels. IEEE J. Solid State Circuits 40 (12) (2005)
Keerthi Heragu, Manish Sharma, Rahul Kundu, Ronald D. Blanton
Test vector generation for charge sharing failures in dynamic logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (12) (2002)
Keerthi Heragu, Manish Sharma, Rahul Kundu, R. D. (Shawn) Blanton
Testing of Dynamic Logic Circuits Based on Charge Sharing. VTS (2001)
Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal
A Test Generator for Segment Delay Faults. VLSI Design (1999)
Keerthi Heragu
Where We Might Stumble with Embedded-System Test. VTS (1998)
Keerthi Heragu, Vishwani D. Agrawal, Michael L. Bushnell, Janak H. Patel
Improving a nonenumerative method to estimate path delay fault coverage. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (7) (1997)
Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal
Fast identification of untestable delay faults using implications. ICCAD (1997)
Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal
Improving accuracy in path delay fault coverage estimation. VLSI Design (1996)
Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal
SIGMA: a simulator for segment delay faults. ICCAD (1996)
Keerthi Heragu, Janak H. Patel, Vishwani D. Agrawal
Segment delay faults: a new fault model. VTS (1996)
Keerthi Heragu, Vishwani D. Agrawal, Michael L. Bushnell
Fault coverage estimation by test vector sampling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (5) (1995)
Keerthi Heragu, Vishwani D. Agrawal, Michael L. Bushnell
Statistical methods for delay fault coverage analysis. VLSI Design (1995)
Keerthi Heragu, Vishwani D. Agrawal, Michael L. Bushnell
FACTS: fault coverage estimation by test vector sampling. VTS (1994)
Keerthi Heragu, Michael L. Bushnell, Vishwani D. Agrawal
An Efficient Path Delay Fault Coverage Estimator. DAC (1994)