K. Wayne Current

Publication Activity (10 Years)

Years Active: 1978-2008
Publications (10 Years): 0

Publications

Marko Aleksic, Nikola Nedovic, K. Wayne Current, Vojin G. Oklobdzija
Jitter Analysis of Nonautonomous MOS Current-Mode Logic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2008)
K. Wayne Current, Kelvin Yuk, Charles McConaghy, Peter R. C. Gascoyne, Jon A. Schwartz, Jody V. Vykoukal, Craig Andrews
A High-Voltage SOI CMOS Exciter Chip for a Programmable Fluidic Processor System. IEEE Trans. Biomed. Circuits Syst. 1 (2) (2007)
K. Wayne Current, Kelvin Yuk, Charles McConaghy, Peter R. C. Gascoyne, Jon A. Schwartz, Jody V. Vykoukal, Craig Andrews
A High-Voltage Integrated Circuit Engine for a Dielectrophoresis-based Programmable Micro-Fluidic Processor. ICMENS (2005)
Marko Aleksic, Nikola Nedovic, K. Wayne Current, Vojin G. Oklobdzija
A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers. PATMOS (2005)
Yongjian Brandon Guo, K. Wayne Current
Low-Power Voltage Comparator Circuit for CMOS Quaternary Logic. J. Multiple Valued Log. Soft Comput. 10 (3) (2004)
Yongjian Brandon Guo, K. Wayne Current
Voltage Comparator Circuits for Multiple-Valued CMOS Logic. ISMVL (2002)
Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current
Clocked CMOS adiabatic logic with integrated single-phase power-clock supply. IEEE Trans. Very Large Scale Integr. Syst. 8 (4) (2000)
Aamir A. Farooqui, K. Wayne Current, Vojin G. Oklobdzija
Partitioned Branch Condition Resolution Logic. SBCCI (2000)
K. Wayne Current
Design of a Quaternary Latch Circuit Using a Binary CMOS RS Latch. ISMVL (2000)
Dan Olson, K. Wayne Current
Hardware Implementation of "Supplementary Symmetrical Logic Circuit Structure" Concepts. ISMVL (2000)
Jelena Popovic, Borivoje Nikolic, K. Wayne Current, Aleksandra Pavasovic, Dragan Vasiljevic
CMOS implementation of low-power oscillators based on the modified Fabre-Normand current conveyor. ICECS (1998)
Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current
Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results. ISLPED (1997)
K. Wayne Current, Vojin G. Oklobdzija, Dragan Maksimovic
Low-Energy Logic Circuit Techniques for Multiple-Valued Logic. ISMVL (1996)
K. Wayne Current
Memory Circuits for Multiple-Valued Logic Voltage Signals. ISMVL (1995)
James F. Parker, K. Wayne Current, Stephen H. Lewis
A CMOS continuous-time NTSC-to-color-difference decoder. IEEE J. Solid State Circuits 30 (12) (1995)
K. Wayne Current
Current-mode CMOS multiple-valued logic circuits. IEEE J. Solid State Circuits 29 (2) (1994)
Wei-Shang Chu, K. Wayne Current
Quaternary Multiplier Circuit. ISMVL (1994)
K. Wayne Current, Jim Parker, Wes Hardaker
Block-Diagram-Level Design Capture, Functional Simulation, and Layout Assembly of Analog CMOS ICs. ISCAS (1993)
K. Wayne Current
Multiple Valued Logic: Current-Mode CMOS Circuits. ISMVL (1993)
K. Wayne Current
A Current-Mode CMOS Algorithmic Analog-to-Quaternary Converter Circuit. ISMVL (1992)
Eric Shieh, K. Wayne Current, Paul J. Hurst, Iskender Agi
High-speed computation of the Radon transform and backprojection using an expandable multiprocessor architecture. IEEE Trans. Circuits Syst. Video Technol. 2 (4) (1992)
K. Wayne Current, M. E. Hurlston
A Bi-Directional Current-Mode CMOS Multiple-Valued Logic Memory Circuit. ISMVL (1991)
J. Liu, Ziqiang Mao, G. Z. Lu, W. H. Han, Tien C. Hsia, K. Wayne Current, Wei-Shang Chu
A new VLSI architecture for real-time control of robot manipulators. ICRA (1991)
Paul J. Hurst, K. Wayne Current, Iskender Agi, Eric Shieh
A VLSI architecture for two-dimensional Radon transform computations. ICASSP (1990)
K. Wayne Current
A CMOS Quaternary Threshold Logic Full Adder Circuit with Transparent Latch. ISMVL (1990)
K. Wayne Current, Paul J. Hurst, Eric Shieh, Iskender Agi
An evaluation of Radon transform computations using DSP chips. Mach. Vis. Appl. 3 (2) (1990)
Stephen Azevedo, James M. Brase, Harry E. Martz, Anil K. Jain, K. Wayne Current, Paul J. Hurst
A Radon transform computer for multidimensional signal processing. ICASSP (1989)
James M. Apffel, K. Wayne Current, Jorge L. C. Sanz, Anil K. Jain
An architecture for region boundary extraction in raster scan images suitable for VLSI implementation. Mach. Vis. Appl. 2 (4) (1989)
J. R. Parkhurst, K. Wayne Current, Anil K. Jain, J. E. Grishaw
A unified DCT/IDCT architecture for VLSI implementation. ICASSP (1988)
James L. Mangin, K. Wayne Current
Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder Circuits. IEEE Trans. Computers 35 (2) (1986)
K. Wayne Current
Pipelined Binary Parallel Counters Employing Latched Quaternary Logic Full Adders. IEEE Trans. Computers 29 (5) (1980)
K. Wayne Current
High Density Integrated Computing Circuitry with Multiple Valued Logic. IEEE Trans. Computers 29 (2) (1980)
K. Wayne Current
A High Data-Rate Digital Output Correlator Design. IEEE Trans. Computers 29 (5) (1980)
K. Wayne Current, Douglas A. Mow
Implementing Parallel Counters with Four-Valued Threshold Logic. IEEE Trans. Computers 28 (3) (1979)
K. Wayne Current, Douglas A. Mow, S. Youssef-Digaleh
A high data rate, low power all-digital correlation circuit design. ICASSP (1979)
K. Wayne Current, Douglas A. Mow
Four-valued threshold logic full adder circuit implementations. MVL (1978)
K. Wayne Current, Douglas A. Mow
Parallel counter design using four-valued threshold logic. ICASSP (1978)
K. Wayne Current, Douglas A. Mow
Applications of multivalued threshold logic in large-scale-intergrated, digital signal processing circuits. MVL (1978)