Jorge Echavarria

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 15

Top Topics

Boolean Networks

Function Approximation

Top Venues

Publications

Martin Schulz, Hossam Ahmed, Xiaolong Deng, Jorge Echavarria, Mathias Gammelmark, Sven Karlsson, Ercüment Kaya, Michal Reznak, Laura Brandon Schulz, Matthew Tovey
From the Physics Lab to the Computer Lab: Towards Flexible and Comprehensive DevOps for Quantum Computing. CF (Companion) (2024)
Jorge Echavarria, Stefan Wildermann, Oliver Keszöcze, Faramarz Khosravi, Andreas Becher, Jürgen Teich
Design and error analysis of accuracy-configurable sequential multipliers via segmented carry chains. it Inf. Technol. 64 (3) (2022)
Jorge Echavarria, Alicia Morales-Reyes, René Cumplido, Miguel A. Salido, Claudia Feregrino Uribe
IP-cores watermarking scheme at behavioral level using genetic algorithms. Eng. Appl. Artif. Intell. 104 (2021)
Marcello Traiola, Jorge Echavarria, Alberto Bosio, Jürgen Teich, Ian O'Connor
Design Space Exploration of Approximation-Based Quadruple Modular Redundancy Circuits. ICCAD (2021)
Jorge Echavarria, Stefan Wildermann, Jürgen Teich
Approximate Logic Synthesis of Very Large Boolean Networks. DATE (2021)
Jorge Echavarria, Stefan Wildermann, Oliver Keszöcze, Faramarz Khosravi, Andreas Becher, Jürgen Teich
On the Approximation of Accuracy-configurable Sequential Multipliers via Segmented Carry Chains. CoRR (2021)
Alberto Bosio, Ian O'Connor, Marcello Traiola, Jorge Echavarria, Jürgen Teich, Muhammad Abdullah Hanif, Muhammad Shafique, Said Hamdioui, Bastien Deveautour, Patrick Girard, Arnaud Virazel, Koen Bertels
. ETS (2021)
Jorge Echavarria, Stefan Wildermann, Oliver Keszöcze, Jürgen Teich
Probabilistic Error Propagation through Approximated Boolean Networks. DAC (2020)
Jorge Echavarria, Stefan Wildermann, Jürgen Teich
AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs. FPT (2018)
Jorge Echavarria, Stefan Wildermann, Eduard Potwigin, Jürgen Teich
Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders. IEEE Embed. Syst. Lett. 10 (2) (2018)
Jorge Echavarria, Stefan Wildermann, Jürgen Teich
Design space exploration of multi-output logic function approximations. ICCAD (2018)
Jorge Echavarria, Katja Schutz, Andreas Becher, Stefan Wildermann, Jürgen Teich
Can Approximate Computing Reduce Power Consumption on FPGAs? ICECS (2018)
Jutta Pirkl, Andreas Becher, Jorge Echavarria, Jürgen Teich, Stefan Wildermann
Self-Adaptive FPGA-Based Image Processing Filters Using Approximate Arithmetics. SCOPES (2017)
Andreas Becher, Jorge Echavarria, Daniel Ziener, Stefan Wildermann, Jürgen Teich
A LUT-Based Approximate Adder. FCCM (2016)
Jorge Echavarria, Stefan Wildermann, Andreas Becher, Jürgen Teich, Daniel Ziener
FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs. FPT (2016)
Jorge Echavarria, Alicia Morales-Reyes, René Cumplido, Miguel A. Salido
FSM merging and reduction for IP cores watermarking using Genetic Algorithms. ReConFig (2014)