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FAU: Fast and error-optimized approximate adder units on LUT-Based FPGAs.

Jorge EchavarriaStefan WildermannAndreas BecherJürgen TeichDaniel Ziener
Published in: FPT (2016)
Keyphrases
  • error rate
  • gray level
  • error minimization
  • image quality
  • error bounds
  • field programmable gate array
  • lookup table
  • hardware software