John Jose

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 66

Top Topics

Network On Chip

Top Venues

ACM Trans. Design Autom. Electr. Syst.

Publications

Syam Sankar, Ruchika Gupta, John Jose, Sukumar Nandi
Sec-NoC: A Lightweight Secure Communication System for On-Chip Interconnects. IEEE Embed. Syst. Lett. 16 (2) (2024)
Syam Sankar, Ruchika Gupta, John Jose, Sukumar Nandi
TROP: TRust-aware OPportunistic Routing in NoC with Hardware Trojans. ACM Trans. Design Autom. Electr. Syst. 29 (2) (2024)
S. Sivakumar, John Jose, Vijaykrishnan Narayanan
Enhancing Lifetime and Performance of MLC NVM Caches Using Embedded Trace Buffers. ACM Trans. Design Autom. Electr. Syst. 29 (3) (2024)
Amit Puri, Kartheek Bellamkonda, Kailash Narreddy, John Jose, Venkatesh Tamarapalli, Vijaykrishnan Narayanan
DRackSim: Simulating CXL-enabled Large-Scale Disaggregated Memory Systems. SIGSIM-PADS (2024)
Thejaswini P, Sahana A. R., Shankar Singh C., John Jose
Strengthening NoC Security: Leveraging Hybrid Encryption for Data Packet Protection. TENCON (2023)
Dipika Deb, John Jose
ZPP: A Dynamic Technique to Eliminate Cache Pollution in NoC based MPSoCs. ACM Trans. Embed. Comput. Syst. 22 (5s) (2023)
Maurizio Palesi, Enrico Russo, Abhijit Das, John Jose
Wireless enabled Inter-Chiplet Communication in DNN Hardware Accelerators. IPDPS Workshops (2023)
V. R. Josna, Rose George Kunthara, Rekha K. James, John Jose
Modelling and Impact Analysis of Push Back Attack in 3D Bufferless Network on Chip. MCSoC (2023)
Amit Puri, Abir Banerjee, John Jose, Tamarapalli Venkatesh
Understanding the Performance Impact of Queue-Based Resource Allocation in Scalable Disaggregated Memory Systems. MCSoC (2023)
S. Sivakumar, John Jose
Self Adaptive Logical Split Cache Techniques for Delayed Aging of NVM LLC. ACM Trans. Design Autom. Electr. Syst. 28 (6) (2023)
K. Neethu, K. C. Sharin Shahana, Rekha K. James, John Jose, Sumit K. Mandal
ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training. IEEE Des. Test 40 (6) (2023)
Syam Sankar, John Jose, Ruchika Gupta, Sukumar Nandi
Enhancing Anonymity in NoC Communication to Counter Traffic Profiling by Hardware Trojans. MCSoC (2023)
Sachin Bagga, Ruchika Gupta, John Jose
PortBlocker: Detection and Mitigation of Hardware Trojan through Re-routing and Bypassing. MCSoC (2023)
Amit Puri, John Jose, Tamarapalli Venkatesh
Design and Evaluation of a Rack-Scale Disaggregated Memory Architecture For Data Centers. CoRR (2023)
Amit Puri, Kartheek Bellamkonda, Kailash Narreddy, John Jose, Tamarapalli Venkatesh
A Practical Approach For Workload-Aware Data Movement in Disaggregated Memory Systems. SBAC-PAD (2023)
Rose George Kunthara, V. R. Josna, K. Neethu, Rekha K. James, John Jose
Modelling and Impact Analysis of Antipode Attack in Bufferless On-Chip Networks. SN Comput. Sci. 4 (3) (2023)
Syam Sankar, Lissiyas Antony, Ruchika Gupta, John Jose, Sukumar Nandi
Exploring Trustable Paths in Network-on-Chip for Low-Slack Packets. ISOCC (2023)
Amit Puri, John Jose, Tamarapalli Venkatesh, Vijaykrishnan Narayanan
DRackSim: Simulator for Rack-scale Memory Disaggregation. CoRR (2023)
Manju Rajan, Mayank Choksey, John Jose
Secure Routing Framework for Mitigating Time-Delay Trojan Attack in System-on-Chip. J. Syst. Archit. 144 (2023)
Sudeep Pasricha, John Jose, Sujay Deb
Electronic, Wireless, and Photonic Network-on-Chip Security: Challenges and Countermeasures. IEEE Des. Test 39 (6) (2022)
Yogesh Kumar, S. Sivakumar, John Jose
ENDURA : Enhancing Durability of Multi Level Cell STT-RAM based Non Volatile Memory Last Level Caches. VLSI-SoC (2022)
Abhijit Das, John Jose
Designing Data-Aware Network-on-Chip for Performance. ISVLSI (2022)
Ruchika Gupta, Vedika J. Kulkarni, John Jose, Sukumar Nandi
Securing On-chip Interconnect against Delay Trojan using Dynamic Adaptive Caging. ACM Great Lakes Symposium on VLSI (2022)
Abhijit Das, Abhishek Kumar, John Jose, Maurizio Palesi
Revising NoC in Future Multicore-Based Consumer Electronics for Performance. IEEE Consumer Electron. Mag. 11 (3) (2022)
Mohammad Humam Khan, Ruchika Gupta, Vedika J. Kulkarni, John Jose, Sukumar Nandi
Hardware Trojan Mitigation for Securing On-chip Networks from Dead Flit Attacks. VLSI-SoC (2022)
Dipika Deb, Rohith M. K., John Jose
FlitZip: Effective Packet Compression for NoC in MultiProcessor System-on-Chip. IEEE Trans. Parallel Distributed Syst. 33 (1) (2022)
Rose George Kunthara, Rekha K. James, Simi Zerine Sleeba, John Jose
DAReS: Deflection Aware Rerouting between Subnetworks in Bufferless On-Chip Networks. ACM Great Lakes Symposium on VLSI (2022)
Manju Rajan, Abhijit Das, John Jose
LOKI: A Hardware Trojan Affecting Multiple Components of an SoC. ISVLSI (2022)
Sudeep Pasricha, John Jose, Sujay Deb
Electronic, Wireless, and Photonic Network-on-Chip Security: Challenges and Countermeasures. CoRR (2022)
Akshay Sarman, Alwin Shaju, Rose George Kunthara, K. Neethu, Rekha K. James, John Jose
RIBiT: Reduced Intra-flit Bit Transitions for Bufferless NoC. VLSI-SoC (2022)
Amit Puri, John Jose, Tamarapalli Venkatesh
Design and Evaluation of a Rack-Scale Disaggregated Memory Architecture For Data Centers. HPCC/DSS/SmartCity/DependSys (2022)
Dipika Deb, John Jose, Maurizio Palesi
COPE: Reducing Cache Pollution and Network Contention by Inter-tile Coordinated Prefetching in NoC-based MPSoCs. ACM Trans. Design Autom. Electr. Syst. 26 (3) (2021)
Vedika J. Kulkarni, R. Manju, Ruchika Gupta, John Jose, Sukumar Nandi
Packet header attack by hardware trojan in NoC based TCMP and its impact analysis. NOCS (2021)
Mohammad Humam Khan, Ruchika Gupta, John Jose, Sukumar Nandi
Dead flit attack on NoC by hardware trojan and its impact analysis. NoCArc@MICRO (2021)
S. Sivakumar, T. M. Abdul Khader, John Jose
Improving Lifetime of Non-Volatile Memory Caches by Logical Partitioning. ACM Great Lakes Symposium on VLSI (2021)
Abhijit Das, John Jose, Prabhat Mishra
Data Criticality in Multithreaded Applications: An Insight for Many-Core Systems. IEEE Trans. Very Large Scale Integr. Syst. 29 (9) (2021)
Abhijit Das, John Jose, Prabhat Mishra
Data Criticality in Multi-Threaded Applications: An Insight for Many-Core Systems. CoRR (2021)
Abhijit Das, Abhishek Kumar, John Jose, Maurizio Palesi
Opportunistic Caching in NoC: Exploring Ways to Reduce Miss Penalty. IEEE Trans. Computers 70 (6) (2021)
Rose George Kunthara, Rekha K. James, Simi Zerine Sleeba, John Jose
Traffic aware routing in 3D NoC using interleaved asymmetric edge routers. Nano Commun. Networks 27 (2021)
Joe Augustine, Kanakagiri Raghavendra, John Jose, Madhu Mutyam
Router Buffer Caching for Managing Shared Cache Blocks in Tiled Multi-Core Processors. ICCD (2020)
Abhijit Das, Abhishek Kumar, John Jose, Maurizio Palesi
Exploiting On-Chip Routers to Store Dirty Cache Blocks in Tiled Chip Multi-processors. ISVLSI (2020)
Giuseppe Ascia, Vincenzo Catania, John Jose, Salvatore Monteleone, Maurizio Palesi, Davide Patti
Improving Inference Latency and Energy of Network-on-Chip based Convolutional Neural Networks through Weights Compression. IPDPS Workshops (2020)
Abhijit Das, Abhishek Kumar, John Jose
Reducing Off-Chip Miss Penalty by Exploiting Underutilised On-Chip Router Buffers. ICCD (2020)
Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose, Valerio Mario Salerno
Exploiting Data Resilience in Wireless Network-on-chip Architectures. ACM J. Emerg. Technol. Comput. Syst. 16 (2) (2020)
R. Manju, Abhijit Das, John Jose, Prabhat Mishra
SECTAR: Secure NoC using Trojan Aware Routing. NOCS (2020)
Dipika Deb, John Jose, Shirshendu Das, Hemangee K. Kapoor
Cost effective routing techniques in 2D mesh NoC using on-chip transmission lines. J. Parallel Distributed Comput. 123 (2019)
Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose
Analyzing networks-on-chip based deep neural networks. NOCS (2019)
Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose
Networks-on-Chip based Deep Neural Networks Accelerators for IoT Edge Devices. IoTSMS (2019)
Dipika Deb, John Jose, Maurizio Palesi
ECAP: energy-efficient caching for prefetch blocks in tiled chip multiprocessors. IET Comput. Digit. Tech. 13 (6) (2019)
Rose George Kunthara, K. Neethu, Rekha K. James, Simi Zerine Sleeba, John Jose
DoLaR: Double Layer Routing for Bufferless Mesh Network-on-Chip. TENCON (2019)
Rose George Kunthara, Rekha K. James, Simi Zerine Sleeba, John Jose
Asymmetric routing in 3D NoC using interleaved edge routers. NoCArc@MICRO (2019)
Rose George Kunthara, K. Neethu, Rekha K. James, Simi Zerine Sleeba, Tripti S. Warrier, John Jose
2L-2D Routing for Buffered Mesh Network-on-Chip. VDAT (2019)
Dipika Deb, John Jose, Maurizio Palesi
Performance Enhancement of Caches in TCMPs Using Near Vicinity Prefetcher. VLSI Design (2019)
Simi Zerine Sleeba, John Jose, Maniyelil Govindankutty Mini
Energy-efficient fault tolerant technique for deflection routers in two-dimensional mesh Network-on-Chips. IET Comput. Digit. Tech. 12 (3) (2018)
Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose
Improving energy consumption of NoC based architectures through approximate communication. MECO (2018)
Simi Zerine Sleeba, John Jose, Maurizio Palesi, Rekha K. James, Maniyelil Govindankutty Mini
Traffic Aware Deflection Rerouting Mechanism for Mesh Network on Chip. VLSI-SoC (2018)
Abhijit Das, Sarath Babu, John Jose, Sangeetha Jose, Maurizio Palesi
Critical Packet Prioritisation by Slack-Aware Re-Routing in On-Chip Networks. NOCS (2018)
Giuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose
Approximate Wireless Networks-on-Chip. DCIS (2018)
Ajay S, Satya Sai Krishna Mohan G, Shashank S Rao, Sujay B Shaunak, Krutthika H. K, Ananda Y. R., John Jose
Source Hotspot Management in a Mesh Network on Chip. VDAT (2018)
Akshay B. P., Ganesh K. M., Thippeswamy D. R., Vishnu S. Bhat, Anitha Vijayakumar, Ananda Y. R., John Jose
Implementation of a Novel Fault Tolerant Routing Technique for Mesh Network on Chip. VDAT (2018)
K. S. Midhula, Sarath Babu, John Jose, Sangeetha Jose
Performance Enhancement of NoCs Using Single Cycle Deflection Routers and Adaptive Priority Schemes. VDAT (2018)
John Jose, Abhijit Das
An Adaptive Deflection Router with Dual Injection and Ejection Units for Mesh NoCs. VLSI Design (2018)
Rose George Kunthara, Rekha K. James, Simi Zerine Sleeba, John Jose
ReDC: Reduced Deflection CHIPPER Router for Bufferless NoCs. ISED (2018)
N. S. Aswathy, R. S. Reshma Raj, Abhijit Das, John Jose, V. R. Josna
Adaptive Packet Throttling Technique for Congestion Management in Mesh NoCs. VDAT (2017)
Elizabeth Isaac, M. Rajasekhara Babu, John Jose
Impact of deflection history based priority on adaptive deflection router for mesh NoCs. Electron. Gov. an Int. J. 13 (4) (2017)
R. S. Reshma Raj, Abhijit Das, John Jose
Implementation and analysis of hotspot mitigation in mesh NoCs by cost-effective deflection routing technique. VLSI-SoC (2017)
John Jose, Joe Augustine, Sijin Sebastian
Dynamic migratory selection strategy for adaptive routing in mesh NoCs. VLSI-SoC (2015)
Reenu James, John Jose, Jobin K. Antony
Smart Port Allocation for Adaptive NoC Routers. VLSI Design (2015)
John Jose, Madhu Mutyam
Implementation and Analysis of History-Based Output Channel Selection Strategies for Adaptive Routers in Mesh NoCs. ACM Trans. Design Autom. Electr. Syst. 19 (4) (2014)
Teena Mathew, K. Chandra Sekaran, John Jose
Study and analysis of various task scheduling algorithms in the cloud computing environment. ICACCI (2014)
John Jose, Bivil M. Jacob, Hashim P. Kamal
An Energy Efficient Load Balancing Selection Strategy for Adaptive NoC Routers. NoCArc@MICRO (2014)
Simi Zerine Sleeba, John Jose, Maniyelil Govindankutty Mini
WeDBless: weighted deflection bufferless router for mesh NoCs. ACM Great Lakes Symposium on VLSI (2014)
Gnaneswara Rao Jonna, John Jose, Rachana Radhakrishnan, Madhu Mutyam
Minimally buffered single-cycle deflection router. DATE (2014)
John Jose, Bhawna Nayak, Damarla Kranthi Kumar, Madhu Mutyam
DeBAR: deflection based adaptive router with minimal buffering. DATE (2013)
Bhawna Nayak, John Jose, Madhu Mutyam
SLIDER: Smart Late Injection DEflection Router for mesh NoCs. ICCD (2013)
John Jose, K. V. Mahathi, J. Shiva Shankar, Madhu Mutyam
TRACKER: A low overhead adaptive NoC router with load balancing selection strategy. ICCAD (2012)
John Jose, J. Shiva Shankar, K. V. Mahathi, Damarla Kranthi Kumar, Madhu Mutyam
BOFAR: buffer occupancy factor based adaptive router for mesh NoCs. NoCArc@MICRO (2011)