Exploiting On-Chip Routers to Store Dirty Cache Blocks in Tiled Chip Multi-processors.
Abhijit DasAbhishek KumarJohn JoseMaurizio PalesiPublished in: ISVLSI (2020)
Keyphrases
- memory subsystem
- multithreading
- high speed
- processor core
- single chip
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- embedded processors
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- signal processor
- analog vlsi
- ibm zenterprise
- computational power
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- end to end
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- image sensor
- speculative execution