Ichiro Fujimori

Publication Activity (10 Years)

Years Active: 1997-2017
Publications (10 Years): 6

Top Topics

Top Venues

IEEE J. Solid State Circuits

Publications

Fazil Ahmad, Greg Unruh, Amrutha Iyer, Pin-En Su, Sherif Abdalla, Bo Shen, Mark Chambers, Ichiro Fujimori
A 0.5-9.5-GHz, 1.2-µs Lock-Time Fractional-N DPLL With ±1.25%UI Period Jitter in 16-nm CMOS for Dynamic Frequency and Core-Count Scaling. IEEE J. Solid State Circuits 52 (1) (2017)
Ichiro Fujimori, Pavan Kumar Hanumolu
EE4: Semiconductor economics: How business decisions are engineered. ISSCC (2017)
Yohan Frans, Ichiro Fujimori, Seung-Jun Bae, Samuel Palermo, Hideyuki Nosaka, Simone Erba
F5: Wireline transceivers for Mega Data Centers: 50Gb/s and beyond. ISSCC (2017)
Hui Pan, Junhua Tan, Evelyn Wenting Wang, Jingguang Wang, Karthik Swaminathan, Ramalingam Pandarinathan, Ramesh Pasagadugula, VamshiKrishna Yakkala, Mostafa Hammad, Karim Abdelhalim, Kaijun Li, Su Cui, Jing Wang, Ahmad Chini, Mehmet Tazebay, Suresh Venkatesan, Derek Tam, Ichiro Fujimori, Kambiz Vakilian
10.3 An analog front-end for 100BASE-T1 automotive Ethernet in 28nm CMOS. ISSCC (2016)
Fazil Ahmad, Greg Unruh, Amrutha Iyer, Pin-En Su, Sherif Abdalla, Bo Shen, Mark Chambers, Ichiro Fujimori
19.1 A 0.5-to-9.5GHz 1.2µs-lock-time fractional-N DPLL with ±1.25% UI period jitter in 16nm CMOS for dynamic frequency and core-count scaling in SoC. ISSCC (2016)
Ichiro Fujimori, Martin Brox, Elad Alon, Pavan Kumar Hanumolu, Gerrit den Besten, Hideyuki Nosaka
F4: Emerging short-reach and high-density interconnect solutions for internet of everything. ISSCC (2016)
Bo Zhang, Karapet Khanoyan, Hamid Hatamkhani, Haitao Tong, Kangmin Hu, Siavash Fallahi, Mohammed M. Abdul-Latif, Kambiz Vakilian, Ichiro Fujimori, Anthony Brewster
A 28 Gb/s Multistandard Serial Link Transceiver for Backplane Applications in 28 nm CMOS. IEEE J. Solid State Circuits 50 (12) (2015)
Chang-Hyeon Lee, Lindel Kabalican, Yan Ge, Hendra Kwantono, Greg Unruh, Mark Chambers, Ichiro Fujimori
A 2.7 GHz to 7 GHz Fractional-N LC-PLL Utilizing Multi-Metal Layer SoC Technology in 28 nm CMOS. IEEE J. Solid State Circuits 50 (4) (2015)
Stephane Le Tuai, Borivoje Nikolic, Tetsuya Iizuka, Ichiro Fujimori
F1: High-speed interleaved ADCs. ISSCC (2015)
Hui Pan, Yuan Yao, Mostafa Hammad, Junhua Tan, Karim Abdelhalim, Evelyn Wenting Wang, Rick C. J. Hsu, Jenny Yu, Joseph N. Y. Aziz, Derek Tam, Ichiro Fujimori
8.6 A full-duplex line driver for Gigabit Ethernet with rail-to-rail class-AB output stage in 28nm CMOS. ISSCC (2014)
Hui Pan, Yuan Yao, Mostafa Hammad, Junhua Tan, Karim Abdelhalim, Evelyn Wenting Wang, Rick C. J. Hsu, Derek Tam, Ichiro Fujimori
A Full-Duplex Line Driver for Gigabit Ethernet With Rail-to-Rail Class-AB Output Stage in 28 nm CMOS. IEEE J. Solid State Circuits 49 (12) (2014)
Chang-Hyeon Lee, Lindel Kabalican, Yan Ge, Hendra Kwantono, Greg Unruh, Mark Chambers, Ichiro Fujimori
A 2.7GHz to 7GHz fractional-N LCPLL utilizing multimetal layer SoC technology in 28nm CMOS. VLSIC (2014)
Elad Alon, Azita Emami, Gerrit den Besten, Ichiro Fujimori, Tadahiro Kuroda, Masafumi Nogawa, Hisakatsu Yamaguchi
F3: Emerging technologies for wireline communication. ISSCC (2013)
Ichiro Fujimori, Masafumi Nogawa
Session 7 overview: Optical transceivers and silicon photonics. ISSCC (2013)
Ichiro Fujimori, SeongHwan Cho, Joshua Friedrich, John T. Stonick
Optical PCB interconnects, Niche or mainstream? ISSCC (2012)
Hui Pan, Magesh Valliappan, Wei Zhang, Kambiz Vakilian, Seong-Ho Lee, Hamid Hatamkhani, Mario Caresosa, Karo Khanoyan, Haitao Tong, Duke Tran, Anthony Brewster, Ichiro Fujimori
A digital wideband CDR with ±15.6kppm frequency tracking at 8Gb/s in 40nm CMOS. ISSCC (2011)
Jun Cao, Bo Zhang, Ullas Singh, Delong Cui, Anand Vasani, Adesh Garg, Wei Zhang, Namik Kocaman, Deyi Pi, Bharath Raghavan, Hui Pan, Ichiro Fujimori, Afshin Momtaz
A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb/s Serial Links Over KR-Backplane and Multimode Fiber. IEEE J. Solid State Circuits 45 (6) (2010)
Jun Cao, Bo Zhang, Ullas Singh, Delong Cui, Anand Vasani, Adesh Garg, Wei Zhang, Namik Kocaman, Deyi Pi, Bharath Raghavan, Hui Pan, Ichiro Fujimori, Afshin Momtaz
21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber. ISSCC (2009)
Afshin Momtaz, David Chung, Namik Kocaman, Jun Cao, Mario Caresosa, Bo Zhang, Ichiro Fujimori
A Fully Integrated 10-Gb/s Receiver With Adaptive Optical Dispersion Equalizer in 0.13-µm CMOS. IEEE J. Solid State Circuits 42 (4) (2007)
Jun Cao, Michael M. Green, Afshin Momtaz, Kambiz Vakilian, David Chung, Keh-Chee Jen, Mario Caresosa, Xin Wang, Wee-Guan Tan, Yijun Cai, Ichiro Fujimori, Armond Hairapetian
OC-192 transmitter and receiver in standard 0.18-μm CMOS. IEEE J. Solid State Circuits 37 (12) (2002)
Afshin Momtaz, Jun Cao, Mario Caresosa, Armond Hairapetian, David Chung, Kambiz Vakilian, Michael M. Green, Wee-Guan Tan, Keh-Chee Jen, Ichiro Fujimori, Yijun Cai
A fully integrated SONET OC-48 transceiver in standard CMOS. IEEE J. Solid State Circuits 36 (12) (2001)
Ichiro Fujimori, Lorenzo Longo, Armond Hairapetian, Kazushi Seiyama, Steve Kosic, Jun Cao, Shu-Lap Chan
A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8× oversampling ratio. IEEE J. Solid State Circuits 35 (12) (2000)
Ichiro Fujimori, Akihiko Nogi, Tetsuro Sugimoto
A multibit delta-sigma audio DAC with 120-dB dynamic range. IEEE J. Solid State Circuits 35 (8) (2000)
Ichiro Fujimori, Tetsuro Sugimoto
A 1.5 V, 4.1 mW dual-channel audio delta-sigma D/A converter. IEEE J. Solid State Circuits 33 (12) (1998)
Ichiro Fujimori, Kazuo Koyama, David Trager, Fred Tam, Lorenzo Longo
A 5-V single-chip delta-sigma audio A/D converter with 111 dB dynamic range. IEEE J. Solid State Circuits 32 (3) (1997)